AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning

Abstract: Performance, power, and area (PPA) optimization is a fundamental task in RTL design, requiring a precise understanding of circuit functionality and the relationship between circuit structures and PPA metrics. Recent studies attempt to automate this process using LLMs, but neither feedback-based nor knowledge-based methods are efficient enough, as they either design without any prior knowledge or rely heavily on human-summarized optimization rules. In this paper, we propose AutoPPA, a fully automated PPA optimization framework. The key idea is to automatically generate optimization rules that enhance the search for optimal solutions. To do this, AutoPPA employs an Explore-Evaluate-Induce ($E^2I$) workflow that contrasts and abstracts rules from diverse generated code pairs rather than manually defined prior knowledge, yielding better optimization patterns. To make the abstracted rules more generalizable, AutoPPA employs an adaptive multi-step search framework that adopts the most effective rules for a given circuit. Experiments show that AutoPPA outperforms both the manual optimization and the state-of-the-art methods SymRTLO and RTLRewriter.

• The paper introduces an automated rule library learning pipeline (E²I workflow) that systematically mines optimization patterns from diverse RTL code pairs.
• It achieves up to 15.31% area and 11.28% delay improvements over manual methods by integrating adaptive retrieval and rule-based beam search.
• The research demonstrates scalable, context-aware optimization across various benchmarks using LLMs and modern EDA tools.

AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning

Motivation and Problem Statement

Performance, power, and area (PPA) optimization at the register-transfer level (RTL) is central to high-quality IC design, requiring nuanced knowledge of circuit structure-function relationships. Prior attempts to automate RTL optimization via LLMs have been constrained either by insufficient circuit-structure understanding (feedback-based) or by limited scalability of manually curated rule bases (knowledge-based). The central question addressed by "AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning" (2604.18445) is whether scalable, reusable PPA optimization knowledge can be induced automatically—directly from raw RTL code—without human intervention or prior knowledge.

Contrastive Code-based Rule Library Learning

AutoPPA introduces a fully automated rule library learning pipeline, the Explore-Evaluate-Induce ($E^2 I$) workflow, designed to systematically mine high-impact optimization patterns from broadly sampled functionally equivalent RTL code pairs:

• Explore: Over 130K Verilog RTLs are mined from open repositories, filtered via Yosys, synthesized in SiliconCompiler for accurate PPA metrics, and N diverse rewrites are generated per code using LLMs, resulting in millions of code pairs.
• Evaluate: Functional equivalence is verified via autogenerated testbenches, while Shannon entropy quantifies PPA diversity among equivalents. Highly diverse pairs with $>5\%$ relative PPA differences are retained.
• Induce: From each high-diversity pair $(C_{non}, C_{opt})$, candidate rules are generated as (snippet, condition, action) triples by LLMs. Rule application is scored (Eq. 1), favoring those reproducibly yielding significant PPA improvement while preserving equivalence. High-quality rules (average score $>0.7$) form the library.

  Figure 1: Construction process for the rule library, leveraging diverse, equivalence-verified code pairs to induce actionable optimization knowledge.

Adaptive Rule-based PPA Optimization

AutoPPA’s optimization engine comprises a retrieval-augmented, multi-step search framework:

• Adaptive Retrieval Augmented Optimization (ARAO): For a target circuit, the LLM first speculates a rule matching current structure. Top-3 similar rules are retrieved from the learned library via embedding similarity. The LLM adapts these rules to current context, then applies them for code optimization via further LLM rewriting.
• Rule-based Enhanced Searching: Iterative beam search (width $k$, steps $s$, expansion $m$) is used; at each step, ARAO expands top candidates. Candidate scoring balances PPA improvement and structural diversity (via TF-IDF similarity, Eq. 2), driving both quality and exploration.

  Figure 2: Overview of the AutoPPA pipeline, integrating rule library learning and adaptive optimization via multi-step search.

Experimental Results

Comprehensive evaluation is performed across 60 benchmark designs (including large, practical modules), with metrics sourced from both open-source and commercial EDA toolchains (Yosys/OpenSTA, SiliconCompiler, Design Compiler), and spanning process nodes from 12nm to 65nm.

Key findings:

• Superior Area and Delay Optimization: AutoPPA achieves up to 15.31% area and 11.28% delay improvement (maximal on benchmark circuits). On 11 representative circuits, area optimization surpasses manual effort by 19.25% and RTLRewriter (SOTA) by 7.56%. Against SymRTLO, AutoPPA attains higher area improvement for complex circuits (18.12–18.93% vs. 17.58%).
• Consistent Scaling: Impr@k curves (Figure 3) show that AutoPPA yields higher optimization rates and steeper scaling than vanilla LLM sampling, even when controlling for code sample budget and LLM backbone (e.g., DeepSeek-V3, Qwen2.5 series).

  Figure 3: Area and delay improvement scaling for AutoPPA vs vanilla LLM approaches, demonstrating consistently superior Impr@k and growth.

• Rule Library Quality: AutoPPA’s learned rule library (101,987 rules) enables ~35% higher area improvement than hand-crafted libraries (12 rules in 16 hours).
• Ablation Studies: Systematic removal of ARAO components (speculation, retrieval, adaptation, search) reveals clear performance degradation, confirming criticality of the integrated design.
• Model Generality: Optimization efficacy is maintained across backbone LLMs and synthesis tools, highlighting downstream applicability and robustness.

Implications and Theoretical Impact

AutoPPA shifts the paradigm of RTL optimization by demonstrating that contrastive code generation can synthesize domain knowledge at scale, obviating the need for manual expert rule curation. The automated induction of (snippet, condition, action) triples bears resemblance to emergent program analysis, but leverages LLMs to both generate diverse code samples and abstract rules. The adaptive retrieval/search strategy ensures that rule application is context-aware and multi-step, overcoming abstraction gaps between generic rules and design-specific optimizations.

Practically, AutoPPA considerably increases productivity and optimization magnitude compared to both manual and previous LLM-based methods. The approach is process-agnostic, scalable, and compatible with contemporary EDA flows. Theoretically, AutoPPA's workflow advances the automation of hardware-specific code reasoning, and its success in domain rule induction suggests broader applicability in logic synthesis, system-level optimization, and co-design tasks.

Future Directions

Several future avenues are suggested:

• Extension to Physical Design: Applying inductive rule learning to layout/timing closure and cross-stage EDA optimization.
• Cross-domain Rule Transfer: Investigating transferability of rules across process nodes, architectures, and design styles.
• Integration with RL and Search Algorithms: Combining contrastive learning with RL methods to optimize search landscapes.
• Improved LLM Backbones: Scaling to larger, more domain-specific LLMs, as well as hybrid models integrating symbolic and neural reasoning.

Conclusion

AutoPPA establishes a fully automated workflow for RTL PPA optimization by mining a high-quality rule library directly from raw code and enabling context-aware, iterative optimization via LLMs. Geometric improvements in area and delay, surpassing both expert and prior SOTA methods, are demonstrated. The method resolves scalability, abstraction, and applicability challenges of prior approaches, opening new directions for automated, knowledge-driven EDA.