RFSoC-Based Integrated Navigation and Sensing Using NavIC

Abstract: Prior art has proposed a secondary application for Global Navigation Satellite System (GNSS) infrastructure for remote sensing of ground-based and maritime targets. Here, a passive radar receiver is deployed to detect uncooperative targets on Earth's surface by capturing ground-reflected satellite signals. This work demonstrates a hardware prototype of an L-band Navigation with Indian Constellation (NavIC) satellite-based remote sensing receiver system mounted on an AMD Zynq radio frequency system-on-chip (RFSoC) platform. Two synchronized receiver channels are introduced for capturing the direct signal (DS) from the satellite and ground-reflected signal (GRS) returns from targets. These signals are processed on the ARM processor and field programmable gate array (FPGA) of the RFSoC to generate delay-Doppler maps of the ground-based targets. The performance is first validated in a loop-back configuration of the RFSoC. Next, the DS and GRS signals are emulated by the output from two ports of the Keysight Arbitrary Waveform Generator (AWG) and interfaced with the RFSoC where the signals are subsequently processed to obtain the delay-Doppler maps. The performance is validated for different signal-to-noise ratios (SNR).

• The paper demonstrates an integrated hardware-software co-design for passive radar sensing using NavIC on RFSoC, achieving real-time processing with low power consumption and rapid acquisition on the coefficient basis.
• Two configurations are implemented and tested: loopback and AWG-based, with key results showing up to 20 dB detection gain, and RMSEs for bistatic range and Doppler within resolution limits at −5 dB SNR.
• Initial results suggest potential further improvements with larger FFT sizes and finer Doppler bin spacing but leave tests for reall-world scenarios and additional challenges to be addressed with further work.

Overview

This paper presents a hardware prototype for passive radar remote sensing using India's regional navigation constellation, NavIC, implemented on an AMD Zynq RFSoC 4×2 platform (2602.08596). The system exploits GNSS-reflectometry: a NavIC satellite acts as a transmitter of opportunity in a bistatic radar geometry, while a passive receiver captures both the direct signal (DS) from the satellite and the ground-reflected signal (GRS) from uncooperative surface targets. The work is motivated by the observation that prior GNSS remote-sensing testbeds rely on discrete RF components with offline MATLAB/Python processing, incurring high latency and power consumption. The contribution here is a single-chip hardware–software co-design that performs acquisition and delay–Doppler map (DDM) generation on-chip, validated through two laboratory configurations.

Signal model and processing chain

The prototype operates on the NavIC L5 Standard Positioning Service signal centered at 1.176 GHz, which uses a tiered code-division multiple access structure built on 1023-bit PRN sequences at a 1.023 MHz chipping rate, repeating every 1 ms (a 100% duty-cycle PRI). These PRN codes serve as radar waveforms owing to their orthogonality and autocorrelation properties. The DS and GRS channels are each modeled as delayed, Doppler-shifted, amplitude-scaled replicas of the PRN-i code:

$$y_d[k] = A_d\, c_i[k-k_d]\, e^{j2\pi f_d k T_s}, \qquad y_{gr}[k] = A_{gr}\, c_i[k-k_{gr}]\, e^{j2\pi f_{gr} k T_s}$$

Processing follows standard coarse-acquisition (C/A) logic: matched filtering against internally generated PRN references combined with Doppler-bin multiplication over 41 bins spanning −10 to +10 kHz at 500 Hz spacing. Satellite identification proceeds by cross-correlating the DS channel with candidate PRN codes; a peak above threshold identifies the illuminating satellite, after which DDM generation is performed on the GRS channel using the selected code. Bistatic range derives from the delay offset $k_{gr}-k_d$, and bistatic Doppler from the GRS DDM peak.

Hardware architecture

The design partitions tasks between the RFSoC's processing system (PS, quad-core ARM A53) and programmable logic (PL). Two synchronized channels capture DS and GRS samples, with results displayed in real time via the PYNQ framework.

Loopback configuration: The PS generates NavIC transmit packets from resampled PRN-2 codes over 1 ms, upsampled to 61.44 MHz via three-stage ×2 interpolation with FIR filters of 23, 15, and 15 taps. Channel effects—path loss, propagation delay, satellite-motion Doppler, AWGN, plus target-induced delay/Doppler offsets—are modeled before streaming samples to DACs via AXI memory-mapped BRAM writes. The DACs interpolate by 40 to 2.45 GHz and upconvert via NCO quadrature modulation; the ADC path reverses this, decimating back to 7.68 MHz for C/A processing. Multi-tile synchronization (MTS), referenced to an external LMX2594 clock, aligns the four parallel processing chains across separate RFDC tiles.

AWG-based configuration: A Keysight M8910A AWG replaces the RFSoC transmitter, emitting emulated DS and GRS signals on two synchronized channels (12-bit, 2.45 GHz clocking) into the RFSoC receiver. Because the RFSoC 4×2 supports two ADC units on one tile, MTS is unnecessary here; samples are packetized per 1 ms frame and delivered over two DMA cores to the PS.

Results

Validation uses PRN-2 illumination and a point target within 10 km of a stationary receiver. The 2 MHz L-band bandwidth yields 293 m range resolution; oversampling to 7.68 MHz refines precision to 40 m. SNR is swept from −5 to −12 dB by injecting AWGN.

Key findings include:

Metric	Value
Satellite detection gain (correct vs. wrong PRN)	up to 20 dB
Successful detection floor (both channels)	−12 dB SNR
RMSE in bistatic range at −5 dB SNR	0.14 km
RMSE in Doppler at −5 dB SNR	250 Hz
Full receiver-chain execution time	274 ms
Power consumption	3.75 W

At −10 dB SNR, the DDM shows a distinct PRN-2 correlation peak roughly 20 dB above the PRN-5 response, confirming reliable satellite identification. Both loopback and AWG+RFSoC configurations detect targets spaced 4 km apart with 500 Hz Doppler returns at −5 dB SNR, and estimated range offsets track ground truth closely down to −12 dB (e.g., 8.007 km versus 8 km ground truth). The GRS channel exhibits lower post-processing gain than the DS channel because target reflection attenuates the return—a consequence inherent to the bistatic passive geometry rather than the implementation. The reported range and Doppler RMSEs fall within the corresponding resolution limits, and the authors note precision can improve further with larger FFT sizes and finer Doppler bin spacing.

Compared against prior software-defined testbeds such as BladeRF-based receivers and interferometric software receivers—which support only offline processing—the RFSoC implementation achieves real-time operation at 3.75 W, with offloading C/A processing from PS to PL projected to yield an additional 3× acceleration.

Limitations and open questions

The paper is explicit that validation is entirely emulation-based: no live NavIC signals are captured, and the current setup does not incorporate link-budget analysis for the heavily attenuated satellite signals expected at a real passive radar receiver. This is a substantive gap, since actual GRS returns from surface targets will be far weaker than the emulated levels tested here, and the demonstrated −12 dB detection floor may not transfer directly to field conditions. Whether the 274 ms execution time and 3.75 W power figure hold under live-sky conditions with multiple simultaneously visible satellites also remains untested. The authors identify extension to real NavIC capture via an analog front end as the immediate next step.

Conclusion

This work demonstrates a compact, single-chip RFSoC realization of NavIC-based passive bistatic sensing, with two synchronized channels, on-chip DDM generation, and real-time display. Emulated validations confirm accurate bistatic range and Doppler estimation down to −12 dB SNR within resolution limits, at millisecond-scale latency and low power—an advance over offline discrete-component testbeds. The principal open issue is performance under genuine link budgets with live satellite signals, which the prototype does not yet address.