- The paper introduces a silicon integrated photonics method for chip-to-chip hyperentanglement distribution and purification, significantly improving entanglement fidelity.
- It employs on-chip generation of hyperentangled states, deterministic CNOT operations, and a novel optical phase-locked loop to stabilize spatial modes.
- The approach shows scalability for quantum repeater networks, with fidelity enhancements from 0.738 to 0.848 under 20% bit-flip and phase-flip errors.
Chip-to-Chip Hyperentanglement Distribution and Entanglement Purification Using Silicon Integrated Photonics
Introduction and Background
Entanglement purification is vital for ensuring high-quality transmission of quantum states in quantum communication systems, particularly when utilizing quantum repeaters to overcome long-distance transmission losses. Previous implementations of entanglement purification have predominantly relied on off-chip discrete devices, which introduce limitations in scalability and stability. This paper introduces an integrated photonics-based approach to entanglement purification, leveraging silicon chips to achieve chip-to-chip hyperentanglement distribution and purification.
Methodology and Experimental Setup
The proposed setup involves three silicon chips where hyperentangled states are generated on a source chip and distributed to receiver chips for purification. Path-encoded high-dimensional entangled photon pairs are created on-chip, transformed into polarization-spatial hyperentangled states via 2D grating couplers, transmitted through fibers, and finally purified using on-chip photonic circuits. The experimental design also incorporates a novel chip-to-chip optical phase-locked loop (OPLL) for stabilizing phase differences between spatial modes.

Figure 1: The chip-based entanglement purification schematic and chip layout.
Results
Experimental evaluation demonstrates significant improvements in entanglement fidelity after purification. With a 20% bit-flip (BF) error rate, entanglement fidelity increased from 0.738 to 0.848. Under phase-flip (PF) errors, fidelity improved similarly post-purification operations. The use of deterministic CNOT operations facilitates these enhancements, as rigorously demonstrated by the experimental results.

Figure 2: QST results before and after purification. (a) Density matrices of the polarization qubit and spatial-mode qubit before purification with a 20% BF error rate. (b) Density matrices of the polarization qubit after purification under a 20% BF error rate. (c) Density matrices of the polarization qubit and spatial-mode qubit before purification with a 20% PF error rate. (d) Density matrices of the polarization qubit after purification under a 20% PF error rate.
Discussion
The integration of all entanglement operation processes on silicon chips not only represents a step towards scalable quantum repeater networks but also addresses technology gaps by employing a CMOS-compatible photonic platform. This advancement lays groundwork for large-scale deployment of quantum repeaters using mature silicon photonics technology.
Conclusion
The demonstrated approach utilizing silicon integrated photonics enables effective entanglement purification, representing a substantial development in quantum communication infrastructure. The potential for integrating additional quantum processes such as entanglement swapping and quantum memory into these scalable systems is projected to further enhance quantum communication capabilities and facilitate the realization of a fully on-chip quantum repeater.
The work paves the way for significant advancements in quantum communication and computation, driven by the robust and scalable nature of silicon photonics. Future work will likely explore extensive deployments of this technology in global quantum networks and refine integration techniques for even more complex quantum operations.