Integrated photonic neuromorphic computing: device, architecture, chip, algorithm (2509.01262v1)

Abstract: AI has experienced explosive growth in recent years. The large models have been widely applied in various fields, including natural language processing, image generation, and complex decision-making systems, revolutionizing technological paradigms across multiple industries. Nevertheless, the substantial data processing demands during model training and inference result in the computing power bottleneck. Traditional electronic chips based on the von Neumann architecture struggle to meet the growing demands for computing power and power efficiency amid the continuous development of AI. Photonic neuromorphic computing, an emerging solution in the post-Moore era, exhibits significant development potential. Leveraging the high-speed and large-bandwidth characteristics of photons in signal transmission, as well as the low-power consumption advantages of optical devices, photonic integrated computing chips have the potential to overcome the memory wall and power wall issues of electronic chips. In recent years, remarkable advancements have been made in photonic neuromorphic computing. This article presents a systematic review of the latest research achievements. It focuses on fundamental principles and novel neuromorphic photonic devices, such as photonic neurons and photonic synapses. Additionally, it comprehensively summarizes the network architectures and photonic integrated neuromorphic chips, as well as the optimization algorithms of photonic neural networks. In addition, combining with the current status and challenges of this field, this article conducts an in-depth discussion on the future development trends of photonic neuromorphic computing in the directions of device integration, algorithm collaborative optimization, and application scenario expansion, providing a reference for subsequent research in the field of photonic neuromorphic computing.