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The symmetric strong circuit elimination property

Published 31 Jul 2025 in math.CO | (2508.00132v1)

Abstract: If C1C_1 and C2C_2 are circuits in a matroid MM with e1e_1 in C1−C2C_1-C_2 and ee in C1∩C2C_1\cap C_2, then MM has a circuit C3C_3 such that e∈C3⊆(C1∪C2)−ee\in C_3\subseteq (C_1\cup C_2)-e. This strong circuit elimination axiom is inherently asymmetric. A matroid MM has the symmetric strong circuit elimination property (SSCE) if, when the above conditions hold and e2∈C2−C1e_2\in C_2-C_1, there is a circuit $C_3'$ with ${e_1,e_2}\subseteq C_3'\subseteq (C_1\cup C_2)-e$. We prove that a connected matroid has this property if and only if it has no two skew circuits. We also characterize such matroids in terms of forbidden series minors, and we give a new matroid axiom system that is built around a modification of SSCE.

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