Provably optimal exact gate synthesis from a discrete gate set

Abstract: We propose a method for exact circuit synthesis using a discrete gate set, as required for fault-tolerant quantum computing. Our approach translates the problem of synthesizing a gate specified by its unitary matrix into a boolean satisfiability (SAT) instance. It leverages the algebraic properties of the coefficients of the matrices that constitute the gate set, enabling the transformation of the constraint of equality between complex matrices into a boolean expression to satisfy. For a specified number of gates, the SAT solver finds a circuit implementing the target or proves that none exist. Optimality of the number of gates is proven by iterating on the number of gates. We also propose some extensions of the method, for example, handling ancillary qubits, post-selection, or classical feedback. The time-to-solution scales double-exponentially with the number of qubits, making it impractical for large circuits. However, since many quantum algorithms rely on small, frequently used subcircuits, and because of the intrinsic value of having a provably optimal circuit synthesis, we believe that our tool are valuable for quantum circuit design.