Seeded Topology Optimization for Commercial Foundry Integrated Photonics
Abstract: We present a seeded topology optimization methodology for integrated photonic devices fabricated on foundry platforms that yields improved performance compared to traditional topology optimization. We employ blurring filters and a DRC correction algorithm to more readily meet design rule checks, resulting in devices with fewer artifacts and improved correlation between simulation and measurements. We apply this process to an ultra-compact TE modal multiplexer, a TE mode converter, a polarization rotator, and a high-contrast grating reflector. The measured insertion loss of the TE mode converter was reduced from 1.37 dB to 0.64 dB through this optimization strategy. This approach enables a two-step inverse design process, merging of physics-informed design strategies with inverse design, and ensures strict compliance with foundry constraints throughout optimization.
Paper Prompts
Sign up for free to create and run prompts on this paper using GPT-5.
Top Community Prompts
Collections
Sign up for free to add this paper to one or more collections.