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Widlar Current Mirror Design Using BJT-Memristor Circuits

Published 17 May 2018 in eess.SP and cs.ET | (1805.06631v3)

Abstract: This paper presents a description of basic current mirror (CM), Widlar current mirror, fourth circuit element (memristor) and an analysis of Widlar Configuration with integrated memristor. The analysis has been performed by comparing a modified configuration with a simple circuit of Widlar CM. The focus of analysis were a power dissipation, a Total Harmonic Distortion and a chip-surface. The results has shown that a presence of memristor in the Widlar CM decreases the chip-surface area and the deviation of the signal in the circuit from a fundamental frequency. Although the analysis of power dissipation has also been conducted, there is no definite conclusion about the power losses in the circuit because of the memristor model.

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