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Computer Architecture with Associative Processor Replacing Last Level Cache and SIMD Accelerator
Published 13 Jun 2013 in cs.AR | (1306.3109v2)
Abstract: This study presents a novel computer architecture where a last level cache and a SIMD accelerator are replaced by an Associative Processor. Associative Processor combines data storage and data processing and provides parallel computational capabilities and data memory at the same time. An analytic performance model of the new computer architecture is introduced. Comparative analysis supported by simulation shows that this novel architecture may outperform a conventional architecture comprising a SIMD coprocessor and a shared last level cache while consuming less power.
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