ReveR: Software Simulator of Reversible Processor with Stack

Published 5 Apr 2011 in cs.ET and cs.AR | (1104.0924v2)

Abstract: A software model of a reversible processor ReveR with the stack is discussed in this paper. An architecture, the minimal set of elementary reversible operations together with an implementation of the basic control flow structures and procedures calls using simple assembler language are described.

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Alexander Yu. Vlasov

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