State machine models of timing and circuit design (1003.0522v1)

Abstract: This paper illustrates a technique for specifying the detailed timing, logical operation, and compositional circuit design of digital circuits in terms of ordinary state machines with output (transducers). The method is illustrated here with specifications of gates, latches, and other simple circuits and via the construction of devices starting with a SR latch built from gates and then moving on to more complex devices. Circuit timing and transients are treated in some detail. The method is based on "classical" automata and recursive functions on strings. No formal methods, extended state machines, or process algebras are involved but a reference is made to potential applications of the Krohn-Rhodes theorem and other group/monoid based algebraic techniques.