Diameter-Dependent Electron Mobility of InAs Nanowires

Abstract: Temperature-dependent I-V and C-V spectroscopy of single InAs nanowire field-effect transistors were utilized to directly shed light on the intrinsic electron transport properties as a function of nanowire radius. From C-V characterizations, the densities of thermally-activated fixed charges and trap states on the surface of untreated (i.e., without any surface functionalization) nanowires are investigated while enabling the accurate measurement of the gate oxide capacitance; therefore, leading to the direct assessment of the field-effect mobility for electrons. The field-effect mobility is found to monotonically decrease as the radius is reduced to sub-10 nm, with the low temperature transport data clearly highlighting the drastic impact of the surface roughness scattering on the mobility degradation for miniaturized nanowires. More generally, the approach presented here may serve as a versatile and powerful platform for in-depth characterization of nanoscale, electronic materials.

• The paper demonstrates that electron mobility in InAs nanowires decreases predictably as the diameter shrinks, highlighting the impact of surface roughness scattering.
• Experimental I–V and C–V spectroscopy with FET fabrication revealed a linear mobility increase of about 422 cm²/Vs per nm as the diameter grows from 7 to 18 nm.
• The study provides actionable insights for nanoelectronic design, suggesting improvements through surface passivation and high-κ dielectric integration for sub-10 nm applications.

Diameter-Dependent Electron Mobility of InAs Nanowires: A Review

This paper presents an exhaustive exploration of the diameter-dependent electron mobility in Indium Arsenide (InAs) nanowires (NWs), emphasizing the influence of diameter on electron transport properties. Using temperature-dependent current-voltage (I-V) and capacitance-voltage (C-V) spectroscopy, the authors investigated intrinsic electron mobility in untreated InAs NWs, providing crucial insights into the role of surface roughness scattering and the impact of NW miniaturization.

Key Findings

The study dissects how electron field-effect mobility in InAs NWs varies with the diameter, revealing a systematic decline in mobility as the NW diameter reduces to the sub-10 nm range. The underlying mechanics hinge on the dominance of surface roughness scattering and the presence of surface/interface fixed charges. These phenomena are prominently responsible for the observed mobility degradation in smaller NWs. Experimental results indicate that larger diameter nanowires exhibit enhanced peak field-effect mobility due to reduced carrier scattering and a more significant cross-sectional area.

The authors meticulously fabricated field-effect transistors with ohmic contacts on InAs NWs, having radii ranging from 7.5 nm to 17.5 nm. The comprehensive electrostatic modeling accompanying the experiments further illuminates the complex interplay between fixed charges, trap states, and electron transport. This modeling provided theoretical support to the C-V measurements and helped quantify parameters such as the gate oxide capacitance.

Numerical Results and Bold Assertions

Field-effect mobility showed a linear increase with the NW radius, wherein for radii spanning 7 to 18 nm, a slope of approximately 422 (cm²/Vs)/nm was recorded. This linear relationship starkly highlights the detrimental effect of scaling NW diameters below 10 nm on mobility. This observation contradicts previous theoretical assessments made for similar semiconductor systems, such as silicon NWs, where mobility enhancement with diameter reduction has also been proposed. The key takeaway here is the pronounced surface roughness scattering effect, intricately tethering mobility to NW diameter.

Temperature-dependent measurements underpin the role of temperature as a facilitator for evaluating electron mobility without the influences of frozen phonons and traps, particularly prevalent in low-temperature environments. For instance, at 50 K, mobility seemed to saturate at larger diameters, underscoring reduced phonon scattering influence.

Implications and Future Directions

This research is pivotal for high-performance nanoelectronics and offers integral insights for the optimization of channel materials in nano-scale transistor applications. As NW-based electronics move towards smaller diameters, understanding and mitigating mobility degradation becomes imperative. These insights are particularly vital to designing future sub-10 nm FETs where electrostatic control and leakage currents are significant concerns.

Beyond theoretical modeling and experimental validation, advancing the surface quality of InAs NWs and thereby reducing interface trap densities could substantially reduce mobility degradation. Future investigations might explore surface passivation techniques or incorporate high-κ dielectric materials to mitigate surface scattering effects. Furthermore, the synthesis of NWs to sustain varied diameter ranges could reveal deeper knowledge of quantum confinement effects at these scales.

Conclusion

The paper contributes a robust framework for characterizing electron mobility in nanoscale semiconductor materials. This research underscores the complexity of factors impacting carrier mobility in NWs and the critical dimensions for bounding the scope of NW scaling in electronic devices. The detailed examination of surface effects lays the groundwork for evolving future computational materials design, focusing on enhancing performance at reduced dimensions.