Design-consistent checking through complete verification-environment generation

Develop complete subscriber, scoreboard, and reference-model generation methods that provide design-consistent checking for LLM-generated verification environments.

Background

The discussion of UVM² notes that generating UVM components and refining tests with coverage feedback does not by itself resolve the problem of checking whether the design behaves correctly. Complete subscriber and scoreboard generation, together with reference-model construction, lies outside the cited system’s core scope.

This problem is important because an incorrect LLM-generated reference model can allow tests to pass even when the checking logic is flawed. AgentDV therefore uses deterministic CSR-derived expected values as a first layer, while the broader problem of design-consistent checking remains unresolved.

References

However, complete subscriber/scoreboard and reference-model generation remain outside its core scope, leaving design-consistent checking as an open issue.

— AgentDV: Closed-Loop Agentic AI for Hardware Design Verification  (2608.27148 - Goli et al., 27 Aug 2026) in Background and Motivation, Section 2.1

Second, isolated verification environments may admit initial states unreachable in the original system. Recovering relevant execution contexts while preserving developer-defined specifications remains an open challenge.

— Towards Agentic Proof Harness Engineering  (2610.23241 - Shanmuganathan et al., 16 Oct 2026) in Section 4, “Challenges of Proof-Harness Engineering”