Bandwidth-rich and processing-in-memory substrates

Evaluate misi’s merge and verification operations on bandwidth-rich hardware substrates, including bank-level processing-in-memory DRAM, to determine whether local histogram accumulation and in-bank dot-product verification improve query performance.

Background

The misi merge is dominated by accumulation work and becomes cache-bound at the largest measured scale. The paper reports an initial GPU port but no experiment on processing-in-memory hardware. It hypothesizes that the existing identifier-block layout could support per-bank local histograms and in-bank verification, leaving the benefit of such hardware unresolved.

References

What remains open, in order of theoretical leverage: skipping on id-sorted layouts (measured skip rates pending), learned within-list impacts (would re-enable WAND at a recall price not yet mapped), calibrated sequential stopping, tiled batch execution (bytes amortize; operations do not), and bandwidth-rich substrates --- the GPU measurement above is a first point on that curve, and bank-level processing-in-memory DRAM is a speculative later one: under the same id-block layout the accumulate is a per-bank local histogram and a verification is an in-bank dot product, though no such device has run this workload.

— misi: a Metric Inverted Sample Index  (2608.27422 - Chavez, 27 Aug 2026) in Section 5, “Position”