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Receiver-driven congestion control support on AMD Pensando P4 SmartNICs

Ascertain whether AMD Pensando SmartNICs, which expose transport-layer programmability via the P4 language, can support receiver-driven congestion control mechanisms in their transport offload.

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Background

The paper surveys SmartNIC-based approaches for making RDMA transport programmable. AMD Pensando SmartNICs allow transport programming using the P4 language, but P4’s programmability is limited for certain features, such as efficient loss recovery. The authors explicitly state uncertainty about whether receiver-driven congestion control can be implemented on these devices, leaving an open question about the feasibility of such protocols on P4-programmable transport datapaths.

Receiver-driven congestion control (e.g., EQDS, NDP, Homa) has advantages for incast-heavy ML workloads, but commercial NIC support is lacking. Determining whether AMD Pensando SmartNICs can implement receiver-driven control would clarify the viability of deploying these protocols on existing programmable NIC hardware.

References

AMD Pensando SmartNICs support using P4 language to program their transport layer, but P4 has limited programmability, e.g., hard to implement efficient loss recovery; it is also unclear if they could support receiver-driven CC.

An Extensible Software Transport Layer for GPU Networking (2504.17307 - Zhou et al., 24 Apr 2025) in Section 2.3, Prior Work on Extensibility — Leveraging SmartNICs