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Direct data-driven control with signal temporal logic specifications (2304.02297v2)

Published 5 Apr 2023 in eess.SY and cs.SY

Abstract: Most control synthesis methods under temporal logic properties require a model of the system, however, identifying such a model can be a challenging task. In this work, we develop a direct data-driven control synthesis method for temporal logic specifications, which does not require this explicit modeling step, capable of providing certificates for the general class of linear systems. After collecting a single sequence of input-output data from the system, we construct a data-driven characterization of the behavior. Using this characterization, we synthesize a controller, such that the controlled system satisfies a (possibly unbounded) temporal logic specification. The underlying optimization problem is solved by mixed-integer linear programming. We demonstrate the applicability of the results through simulation examples.

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