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A Polynomial Time Algorithm for Finding Area-Universal Rectangular Layouts

Published 15 Feb 2013 in cs.CG and cs.DS | (1302.3672v7)

Abstract: A rectangular layout $\mathcal{L}$ is a rectangle partitioned into disjoint smaller rectangles so that no four smaller rectangles meet at the same point. Rectangular layouts were originally used as floorplans in VLSI design to represent VLSI chip layouts. More recently, they are used in graph drawing as rectangular cartograms. In these applications, an area $a(r)$ is assigned to each rectangle $r$, and the actual area of $r$ in $\mathcal{L}$ is required to be $a(r)$. Moreover, some applications require that we use combinatorially equivalent rectangular layouts to represent multiple area assignment functions. $\mathcal{L}$ is called {\em area-universal} if any area assignment to its rectangles can be realized by a layout that is combinatorially equivalent to $\mathcal{L}$. A basic question in this area is to determine if a given plane graph $G$ has an area-universal rectangular layout or not. A fixed-parameter-tractable algorithm for solving this problem was obtained in \cite{EMSV12}. Their algorithm takes $O(2{O(K2)}n{O(1)})$ time (where $K$ is the maximum number of degree 4 vertices in any minimal separation component), which is exponential time in general case. It is an open problem to find a true polynomial time algorithm for solving this problem. In this paper, we describe such a polynomial time algorithm. This paper has been revised for many versions. For previous versions, referrers who are familiar with area-universal rectangular layouts always have the same doubt for the correctness of our algorithm. They doubt that our algorithm will give a wrong output which combine two \emph{conflicting} REL together. In the current version, we realize this critical issue for the previous algorithm and we will provide two subsections 5.3 and 5.4 to solve this issue. (A backtracking algorithm to detect wrong outputs.)

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