Papers
Topics
Authors
Recent
2000 character limit reached

The Effected Oxide Capacitor in CMOS Structure of Integrated Circuit Level 5 Micrometer Technology

Published 20 Dec 2009 in cs.OH | (0912.3971v1)

Abstract: This article is present the effected oxide capacitor in CMOS structure of integrated circuit level 5 micrometer technology. It has designed and basic structure of MOS diode. It establish with aluminum metallization layer by sputtering method, oxide insulator layer mode from silicon dioxide, n+ and p+ semiconductor layer, it has high capacitance concentrate. From the MOS diode structure silicon dioxide thickness 0.5 micrometer, it will get capacitance between aluminum metal layer and p+ semiconductor at 28.62 pF, the capacitance between aluminum metal layer and n+ semiconductor at 29.55 pF. In this article establish second metal layer for measurement density values of first aluminum metal layer with second aluminum metal layer, it has density values at 16 pF.

Summary

Paper to Video (Beta)

Whiteboard

No one has generated a whiteboard explanation for this paper yet.

Open Problems

We haven't generated a list of open problems mentioned in this paper yet.

Continue Learning

We haven't generated follow-up questions for this paper yet.

Collections

Sign up for free to add this paper to one or more collections.