Value-Freezing Temporal Logics

• Value-freezing temporal logics are formal frameworks that incorporate freeze quantifiers to capture and compare data or time values along system traces.
• They extend classical logics like LTL, MTL, and STL to express non-local event dependencies, with applications in runtime monitoring, model checking, and contract specification.
• Decidability and complexity vary across fragments, where techniques such as SMT-based verification and flatness restrictions enable practical analysis despite inherent challenges.

Value-freezing temporal logics are a family of formal specification and reasoning frameworks extending classical temporal logics (such as LTL, MTL, STL) by the ability to store data or timestamp values encountered along a trace and compare them at future or past positions. This fundamentally augments the expressive power of temporal logics, enabling properties that relate values across distinct time-points or positions—such as “the value seen now will recur later,” “event B must occur within 5 time units of event A, holding the same parameter,” or “the signal stabilizes around some previously measured level.” Implementations span finite/state-word, timed-word, and real-valued signal semantics, and the introduction of value freezing has pivoted both theoretical research (on expressiveness, decidability, and complexity) and applied formal verification (in runtime monitoring, model checking, and contract specification).

1. Foundational Syntax and Semantics

Value-freezing is realized by introducing explicit freeze binders and equality/comparison tests against frozen values or times. The canonical syntactic operator is a freeze quantifier/down-arrow ($\downarrow$ or $x.$), which stores the current data (or time) into a register or variable, and later occurrences of up-arrow ($\uparrow$) or clock constraints ($T-x\in I$) compare current and stored values.

Core examples:

• Freeze-LTL on data words:

$$\varphi ::= a \mid \neg\varphi \mid \varphi \vee \psi \mid X\varphi \mid \varphi U \psi \mid \downarrow_x\varphi \mid \uparrow_x$$

Here, $\downarrow_x$ stores the data value at position $i$ into register $x$; $\uparrow_x$ tests equality of current data value and the value in $x$ (Decker et al., 2015).

• TPTL on timed words:

$x.$0

where $x.$1 binds $x.$2 to the current time; $x.$3 checks a timing constraint between the current position and the frozen time (Pandya et al., 2011, Krishna et al., 2021).

• STL*, for real-valued signals:

$x.$4

e.g., $x.$5 stores the current time or signal value in index $x.$6 (Brim et al., 2013, Ghorbel et al., 2024).

Frozen values are held in a register bank (often with size restrictions for decidability), can be compared at arbitrary future/past points, and in many settings can be multi-attributed or even structured collections (with dependency or ordering constraints, see below).

2. Expressiveness, Comparison to Classical Temporal Logics

Value-freezing logics strictly extend the expressive power of classical temporal, metric, or first-order logics. Freeze quantification allows recognition of patterns and dependencies that modal or metric restrictions fundamentally cannot encode.

• Strict Expressiveness Hierarchy:
  • TPTL[U,S] $x.$7 MTL[U,S]: Freeze quantification allows relating non-local events and enforcing synchronization patterns (e.g., “both $x.$8 and $x.$9 at a precise delay from $\uparrow$0”), which are provably inexpressible in metric binary modal logics (Pandya et al., 2011).
  • 1-TPTL[U,S] and STL* both strictly subsume MITL, ECTL, and other fragments, allowing, for instance, “holding the value of $\uparrow$1 at one point and comparing it with another much later” (Krishna et al., 2021, Ghorbel et al., 2024).
• Typical Examples:
  • In TPTL: $\uparrow$2 — “After $\uparrow$3, see a $\uparrow$4 strictly 1–2 units later” (Pandya et al., 2011).
  • In STL*: $\uparrow$5 — “Within 5 time units, $\uparrow$6 must rise by 8 above the value at the freeze point” (Brim et al., 2013).
• Generalization of Event-Clock and Counting Logics: Using freezing, event-clock modalities (distance to last/next occurrence) and explicit event-counting can be encoded by manipulating frozen times and values (Tonetta, 2017).

3. Decidability and Complexity Frontiers

The introduction of value-freezing quantification typically renders both the satisfiability and model checking problems undecidable or at least highly complex, but there exist important decidable fragments.

Key boundaries:

• Freeze LTL with future operators and 1 register is decidable over finite data words, but not primitive recursive [0610027, (Decker et al., 2015)]. Adding past, a second register, or moving to infinite words yields $\uparrow$7-hardness or worse.
• TPTL[U,S] is undecidable in general (even with only one register, both future and past), but 1-TPTL[U,S] with non-adjacency (prohibiting abutting intervals in constraints) is EXPSPACE-complete and strictly more expressive than MITL (Krishna et al., 2021).
• Freeze-LTL with ordered attributes, imposing a tree-dependency on frozen variables (so only “bundles” along paths can be frozen together), induces a hierarchy of complexities: the k-depth fragment is $\uparrow$8-complete, ultimately reaching $\uparrow$9 for unbounded depth (Decker et al., 2015).

Representative complexity classes:

Fragment	Registers/Dependencies	Decidability	Complexity Class
Freeze LTL, future, 1 reg	none	Decidable	Non-primitive recursive
Freeze LTL, future, $T-x\in I$02 regs	none	Undecidable	$T-x\in I$1-complete
Freeze LTL, tree-ordered attributes	tree-forest dependency	Decidable	$T-x\in I$2
1-TPTL[U,S], non-adjacent	N/A	Decidable	EXPSPACE-complete
Flat Freeze LTL on 1-CA	flatness restriction	Decidable	at most 2NEXPTIME

Further restrictions (e.g., flatness (Lechner et al., 2016)) or translation to non-adjacent automata enable niche but practically useful decidable fragments.

4. Model Checking, Monitoring, and Tool Support

Value-freezing logics have been implemented and exploited in (1) symbolic model checking, (2) runtime monitoring, and (3) robustness analysis, demonstrating that, despite theoretical complexity, tractable algorithms arise for important use cases.

• SMT-Based Verification: LTL-EF extends LTL with value-freezing operators $T-x\in I$3. Satisfiability modulo theories (e.g., linear real arithmetic) is tackled via reduction to equisatisfiable formulas in LTL with prophecy/history variables, solvable by standard SMT model checkers (e.g., nuXmv, IC3IA) (Tonetta, 2017).
• Monitor Synthesis: For STL*, monitoring traces with $T-x\in I$4 freeze variables in discrete time is enabled by recursive calls and cache-efficient acceleration via interval arithmetic. Complex formulas with $T-x\in I$5 freezes and $T-x\in I$6 up to $T-x\in I$7 can be checked efficiently (seconds to minutes) (Ghorbel et al., 2024).
• Robustness Analysis: STL* defines a robustness metric generalizing MTL, and tooling (e.g., Parasim) implements dynamic programming-based evaluation of robustness over sampled signals, supporting case studies in systems biology and hybrid control (Brim et al., 2013).

5. Decidable and Fragmented Extensions

Numerous avenues have been investigated to balance expressiveness and decidability:

• Partial Adjacency: The restriction PA-1-TPTL (partial adjacency) requires, within each freeze scope, that all intervals used in time constraints are non-adjacent (no two share an endpoint except at zero). Satisfiability remains decidable and PA-1-TPTL strictly subsumes partially-punctual MTL (Krishna et al., 2024).
• Attribute Dependencies: Freeze LTL with attributes ordered as a forest allows controlled multi-register freezing while blocking arbitrary tuples. Decidability is preserved but complexity climbs a fast-growing hierarchy (Decker et al., 2015).
• Flatness: Flat value-freezing logics restrict the placement of freezes with respect to temporal modalities ("no freeze in the left operand of a positive until"), reducing the model checking problem to reachability in parameterized one-counter automata and eventually to Presburger arithmetic (Lechner et al., 2016).
• Extensions to Inequality and Navigation: Advanced navigational modalities (e.g., “until to a state with a different value”) remain decidable when suitably constrained to one attribute, while allowing navigation by pairs of values or forgetting-past erases decidability (Kara et al., 2010).

6. Illustrative Applications

Value-freezing temporal logics have been deployed for specification and analysis in multiple domains:

• Component-Based Software: LTL-EF formalizes requirements like “at every receive, the data equals the last sent payload,” realized as $T-x\in I$8 (Tonetta, 2017).
• Cyber-Physical Systems: STL* specifies signal oscillation, staircase, and stabilization properties beyond STL; for example, pulse-detection, stabilization within $T-x\in I$9 of a previously measured value, or expressing local maxima/minima (Brim et al., 2013, Ghorbel et al., 2024).
• Runtime Verification: Monitoring on out-of-order data streams with message loss/delay uses freeze quantification with three-valued semantics (unknown/true/false), yielding sound and complete verdicts despite incomplete information (Basin et al., 2017).

7. Research Directions and Decidability Frontiers

Current research themes encompass:

• Maximal decidable fragments: Identification of broad, boolean-closed sublogics (e.g., PA-1-TPTL) that maximize expressiveness under algorithmically feasible complexity (Krishna et al., 2024, Krishna et al., 2021).
• Complexity-theoretic delineations: Application of fast-growing complexity hierarchies ($$\varphi ::= a \mid \neg\varphi \mid \varphi \vee \psi \mid X\varphi \mid \varphi U \psi \mid \downarrow_x\varphi \mid \uparrow_x$$0 etc.) to precisely classify cost as expressiveness increases with available freeze/register/attribute power (Decker et al., 2015).
• Efficiency in monitoring: Interval-acceleration and recursive computation for STL* have enabled analysis on traces previously out of reach, but practical performance remains an area of continued optimization (Ghorbel et al., 2024).
• Robustness to data granularity: Handling the effect of discretization and sampling error in quantitative semantics and the effect of tight time intervals/clock drift in the logic (Brim et al., 2013).

Value-freezing temporal logics have become central in both the theory and practice of data- and time-dependent specification, sitting at the interface of automata theory, formal verification, and practical analysis in software, embedded, and hybrid systems.