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Universal FSA Emulation by Neural Finite-State Machines

Updated 7 December 2025
  • Universal FSA Emulation is a method where finite-depth feedforward ReLU and threshold networks simulate any deterministic finite automaton by encoding state transitions for bounded-length inputs.
  • It employs explicit layerwise constructions, including one-hot and binary encodings with two-layer transition modules, to implement regular language recognition.
  • The approach demonstrates exponential state compression, latent embeddings of Myhill–Nerode equivalence classes, and a formal expressivity boundary for fixed-depth networks.

Universal finite-state automaton (FSA) emulation refers to the capacity of certain neural network architectures—specifically, finite-depth feedforward ReLU and threshold networks—to exactly simulate any deterministic finite automaton (DFA) on bounded-length inputs, thus acting as "neural finite-state machines" (N-FSMs). This is achieved through explicit layerwise constructions that encode DFA state transitions in the network’s depth, enabling precise realization of regular languages and delineating a formal expressivity boundary for such networks. The central results formalize layer and parameter requirements, provide state compression strategies, establish embeddings of Myhill–Nerode equivalence classes into continuous latent spaces, and rigorously show that fixed-depth networks cannot recognize non-regular languages (Dhayalkar, 16 May 2025).

1. Definition and Theoretical Framework

A deterministic finite automaton is defined as a 5-tuple M=(Q,Σ,δ,q0,F)M = (Q, \Sigma, \delta, q_0, F), where QQ is a finite set of nn states, Σ\Sigma a finite input alphabet of size kk, δ:Q×ΣQ\delta: Q \times \Sigma \to Q the deterministic transition function, q0Qq_0 \in Q the initial state, and FQF \subseteq Q the accepting states. On input x=s1s2sTΣTx = s_1 s_2 \cdots s_T \in \Sigma^T, the DFA recursively applies ht=δ(ht1,st)h_t = \delta(h_{t-1}, s_t) for t=1,,Tt = 1, \dots, T and accepts if hTFh_T \in F.

An N-FSM corresponding to MM is a feedforward network fθ:RTk{0,1}f_\theta: \mathbb{R}^{Tk} \to \{0,1\} satisfying fθ(x)=1f_\theta(x) = 1 if δ^(q0,x)F\hat\delta(q_0, x) \in F and $0$ otherwise. At each network layer, the hidden representation encodes the DFA state and the final layer tests for membership in FF (Dhayalkar, 16 May 2025).

2. Explicit Construction of Feedforward Emulators

Given a DFA M=(Q,Σ,δ,q0,F)M = (Q, \Sigma, \delta, q_0, F), the emulation proceeds through explicit neural architectures:

2.1. One-Hot Encodings

  • Symbols: Each aΣa \in \Sigma is represented by u(a){0,1}ku^{(a)} \in \{0,1\}^k.
  • States: Each qjQq_j \in Q is mapped to e(j){0,1}ne^{(j)} \in \{0,1\}^n.
  • At step tt, the hidden state ht1{0,1}nh_{t-1} \in \{0,1\}^n is concatenated with u(st)u^{(s_t)} to form the input to the transition module.

2.2. Two-Layer Transition Modules

  • Hidden Layer: For each (j,a)(j, a), an “AND-unit” zj,a=ReLU(ht1,j+ua(a)1)z_{j,a} = \mathrm{ReLU}(h_{t-1,j} + u^{(a)}_a - 1) ensures activation if and only if the network is in state qjq_j and receives symbol aa.
  • Output Layer: The next state ht,ih_{t,i} is computed as a sum over the activated zj,az_{j,a}, with weights Wi,(j,a)(2)=1W^{(2)}_{i, (j,a)} = 1 iff δ(qj,a)=qi\delta(q_j, a) = q_i.

2.3. Readout Layer

Once TT symbols are processed, the network produces hT{0,1}nh_T \in \{0,1\}^n. The indicator y=step(vhT12)y = \mathrm{step}(v^\top h_T - \frac{1}{2}) (with vi=1v_i = 1 iff qiFq_i \in F) determines acceptance.

2.4. Depth and Width Bounds

Construction Depth DD Width WW
One-hot + ReLU $2T + 1$ O(nk)O(nk)
Binary + threshold $2T + 1$ O(nk)O(nk)

The construction ensures exact simulation for all xx of length T\leq T. For inputs restricted to at most nn symbols, D2n+1D \leq 2n + 1.

3. Exponential State Compression

State encodings can be exponentially compressed by representing DFA states as log2n\lceil \log_2 n\rceil-bit binary codes:

  • Binary State Encoding: Map each qjq_j to b(j){0,1}db^{(j)} \in \{0,1\}^d with d=log2nd = \lceil \log_2 n \rceil.
  • Transition Realization: Each output bit \ell is a Boolean function f:{0,1}d+k{0,1}f_\ell: \{0,1\}^{d+k} \to \{0,1\} specifying the \ell-th bit of B(δ(q,u))\mathcal{B}(\delta(q, u)).
  • Threshold Circuits: Classical results guarantee a depth-2 threshold circuit for any finite Boolean function. Each bit is realized via threshold gates.

This approach achieves hidden-state width d=O(logn)d = O(\log n). Depth and overall layer width are preserved at $2T+1$ and O(nk)O(nk), respectively (Dhayalkar, 16 May 2025).

4. Myhill–Nerode Equivalence and Latent Embeddings

The Myhill–Nerode relation partitions strings into equivalence classes corresponding to DFA states:

  • Embedding Theorem: There exists a feedforward network fθ:ΣTRdf_\theta: \Sigma^T \to \mathbb{R}^d such that fθ(x)=fθ(y)f_\theta(x) = f_\theta(y) iff xLyx \equiv_\mathcal{L} y. If x̸Lyx \not\equiv_\mathcal{L} y, then fθ(x)fθ(y)f_\theta(x) \neq f_\theta(y).
  • Construction: Run DFA simulation to obtain g(x)=e(i){0,1}ng(x) = e^{(i)} \in \{0,1\}^n, then project using VRd×nV \in \mathbb{R}^{d \times n} mapping each e(i)e^{(i)} to distinct viv_i in Rd\mathbb{R}^d.
  • Johnson–Lindenstrauss Compression: The set {v1,,vn}\{v_1, \dots, v_n\} can be further reduced to dimension d=O(logn)d' = O(\log n) while preserving linear separability, thus embedding equivalence classes in low-dimensional latent space (Dhayalkar, 16 May 2025).

5. Expressivity Limitations: Boundary for Regular Languages

Feedforward networks of fixed depth and width possess a finite partitioning capacity:

  • Linear Region Bound: For depth DD and width WW, any such network partitions input space RTk\mathbb{R}^{Tk} into R=O(TWD)R = O(T^{WD}) regions.
  • Non-Regular Language Limitation: Languages such as {anbn:n1}\{a^n b^n : n \geq 1\} require capacity for infinitely many regions, which exceeds what is possible for fixed DD and WW. Thus, such networks cannot recognize non-regular languages.
  • Formal Lower Bound: For every such network, there exists N=N(D,W)N = N(D,W) such that, for all n>Nn > N, correct classification of all strings in {anbn}{anbn+1}\{a^n b^n\} \cup \{a^n b^{n+1}\} is impossible. Only regular languages are exactly recognizable (Dhayalkar, 16 May 2025).

6. Synthesis of Results and Architectural Trade-Offs

Emulation Mode Depth DD Width WW State Width
One-hot encoding + ReLU $2T+1$ O(nk)O(nk) nn
Binary encoding + threshold $2T+1$ O(nk)O(nk) O(logn)O(\log n)
Myhill–Nerode embedding $2T+1$ O(nk)O(nk) O(logn)O(\log n)
  • State Compression: Exponential compression from nn-dim. one-hot to O(logn)O(\log n)-bit binary without sacrificing expressivity for finite-state computations.
  • Latent Embeddings: Faithful, linearly-separable vectorial mapping of equivalence classes, with further dimension reduction via random projection possible.
  • Expressivity Boundary: The constructive approach delineates that regular languages are both the upper and lower bounds of what N-FSMs can recognize with fixed architecture.
  • Bridging Symbolic and Neural Computation: These results rigorously instantiate a blueprint for realizing symbolic algorithms within neural architectures (Dhayalkar, 16 May 2025).

7. Context and Significance

The established equivalence between neural finite-state machines and DFAs provides a mathematically precise characterization of neural network capacity in symbolic sequence processing, automata simulation, and neural-symbolic integration. The constructive nature of the methods contrasts with prior heuristic or probing-based analyses, supplying explicit network weights, architectures, and representations. This formalization enables principled design of neural models for tasks where regular language structure is fundamental, while also identifying exact limits for problems involving unbounded memory or non-regular languages. As such, universal FSA emulation serves as a foundational result, bridging disciplines and informing further research on the correspondence between discrete automata and continuous neural computation (Dhayalkar, 16 May 2025).

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