TURNG: Quantum-Inspired Uniform Random Generator

• TURNG is a system that generates mathematically and statistically uniform random numbers using permutation complexity and system noise.
• It employs modular reduction of heavy-tailed observables like permutation count and execution time to achieve uniform n‐bit outputs with rigorous statistical guarantees.
• Empirical validations, including NIST tests, confirm that implementations such as QPP-RNG consistently produce high min-entropy and robust cryptographic quality randomness.

A True Uniform Random Number Generator (TURNG) is a device or protocol that generates random outputs that are provably uniform over their domain in both a mathematical and statistical sense. In contrast to ordinary true random number generators (TRNGs) that may require further whitening or extraction to achieve uniformity, TURNGs are specifically engineered to ensure that the probability of every possible output symbol is equal and that this property can be justified by theoretical analysis and rigorous empirical validation. Recent advances, particularly the Random Permutation Sorting System (RPSS), have established new quantum-inspired paradigms and implementation techniques that realize TURNGs with high reliability, platform-independence, and robust entropy characteristics (Kuang, 12 Sep 2025).

1. Quantum-Inspired Statistical Foundation

The RPSS framework establishes a quantum-statistical basis for TURNG design. The core mechanism relies on two conjugate-like observables: the permutation count (𝛍Nₚ), representing the number of random permutations required to sort a randomly shuffled array, and the elapsed sorting time (𝛍T), reflecting the computational time over the full cycle. These observables are not strictly quantum but are mathematically modeled using concepts from statistical quantum mechanics. Their non-commutativity is illustrated as

$[\mu N_p, \mu T] \ne 0$

mirroring the uncertainty relations of quantum theory. The objective is to harness both the combinatorial complexity (from the vastness of the permutation space, N!) and the physical system-level noise (system jitter) to guarantee unpredictability. Modular reduction (e.g., taking a variable modulo $2^n$) acts as a "collapse" operation, projecting the heavy-tailed, non-uniform raw distributions into flat, uniform outcome spaces.

2. Mathematical Proofs of Uniformity via Modular Reduction

The central theoretical argument is that heavy-tailed variables such as permutation counts (𝛍Nₚ) and execution times (𝛍T), though non-uniform and right-skewed in their raw distribution, become uniformly distributed under modular reduction when the underlying scale is large. Specifically, if $M$ (the effective pool of possible sorting process outcomes, e.g., $M = m \cdot N!$ with $m$ a batch/repetition parameter) satisfies $M \gg 2^n$, then

$\Pr[\tau_{N_p} = r] = 1/2^n + O(1/M)$

for all $r \in \{0, \ldots, 2^n - 1\}$. An analogous result holds for the elapsed time $\mu T$, where

$\Pr[\tau_T = t] = 1/2^n + O(1/\mathbb{E}[\mu T])$

These results confirm that even if the microstate space is nonuniform, the coarse-grained modular mapping ensures the output is statistically indistinguishable from a uniform source as the array size or repetition parameter is increased. This proof is grounded in characteristic function decay and Poisson summation arguments, detailed in the appendix of (Kuang, 12 Sep 2025).

3. Practical Realization: QPP-RNG and System Noise Amplification

The practical implementation, QPP-RNG (Quantum Permutation Pad RNG), demonstrates how RPSS is realized on commodity systems without dedicated entropy hardware. The process is as follows:

• A deterministic PRNG (typically an LCG) generates ephemeral QPP pads, each pad used to determine a series of stochastic permutations.
• An ordered array is permuted randomly using instructions derived from the pad. The system records the number of permutation attempts necessary to restore sorted order (the permutation count).
• Simultaneously, the elapsed cycle time for the full operation is measured (in nanoseconds or higher resolution).
• Both $\mu N_p$ and $\mu T$ are reduced modulo $2^n$ to emit uniform $n$-bit output symbols.
• The elapsed time ($\mu T$) feedbacks into seeding the pad generation, creating a self-stabilizing, closed-loop entropy engine that is robust to PRNG compromise.

System jitter—arising from microarchitectural factors (pipeline stalls, cache evictions, memory contention, OS scheduling)—affects $\mu T$ and ensures that even with a deterministic pad, outputs remain unpredictably uniform due to continual hardware-induced entropy injection.

4. Empirical Validation and Statistical Robustness

Empirical analyses (per NIST SP 800-90B) show that RPSS-based systems converge rapidly to high min-entropy, producing outputs with statistical uniformity matching theoretical predictions. Key empirical findings include:

• Histograms of $\tau_{N_p}$ and $\tau_T$ (post-modular reduction) nearly perfectly fit the expected discrete uniform law; deviations are $O(1/M)$ and decrease with system scale.
• Central Limit Theorem effects are observed in the bin-count fluctuations: while the underlying observables are highly skewed and non-Gaussian, the modular-reduced symbol counts approach Gaussian noise around the uniform mean.
• In validation, output sequences consistently pass min-entropy tests, chi-squared tests for goodness-of-fit, and demonstrate independence even under varying system loads and environmental conditions.

These properties hold across diverse hardware and software platforms, confirming platform independence and broad applicability.

5. Comparison to Conventional TRNG and Entropy Sources

Traditional TRNGs rely on physical phenomena—thermal shot noise, avalanche diode breakdown, photon statistics, or superconducting tunneling—to generate entropy, often requiring complex extraction and whitening to achieve acceptable statistical uniformity. By contrast, RPSS/TURNGs combine algorithmic amplification of permutation complexity with harnessed physical disorder (system jitter), obviating the need for dedicated hardware. The closed-loop feedback ensures self-stabilization and regeneration of entropy, even if an adversary can observe or manipulate initial seeds. RPSS thus functions as a robust, platform-agnostic entropy engine suited for cryptographic and probabilistic computing.

6. Implementation, Scalability, and Technical Considerations

RPSS-based TURNGs are implemented via lightweight software (pure code) or as hardware-accelerated PRNG modules. They require only standard microprocessor or microcontroller environments, exploiting ordinary execution time variability. The quality and speed scale with the array size $N$ and the batch repetition $m$; for practical purposes, configurations are chosen so that $M \gg 2^n$, allowing for $n$-bit outputs with negligible bias.

Key implementation steps:

Step	Observable Used	Reduction
Permutation Sorting	$\mu N_p$	$\bmod\ 2^n$
Elapsed Execution Time	$\mu T$	$\bmod\ 2^n$
Output Generation	Both	Uniform $n$-bit

Feedback of $\mu T$ into the QPP pad seed makes the generator self-healing and robust even after power cycles or environment resets.

7. Significance and Future Directions

RPSS-based TURNGs represent a new direction in randomness infrastructure. Their quantum-inspired design ensures mathematically provable uniformity directly at the generator level, surpassing the statistical uniformity and robustness of most conventional TRNGs. Their independence from exotic hardware, combined with the theoretical guarantees of output uniformity post-modulo-reduction, allows scalable, portable deployment in security-sensitive and resource-constrained environments.

These methods open additional directions for hybrid entropy engines: combining multiple conjugate observables, enhancing complexity via larger permutation spaces or richer timing measurements, and exploring closed-loop entropy stabilization in distributed systems and random beacons. Their strong theoretical underpinning positions RPSS and similar frameworks as reference architectures for future TURNG implementations in both hardware and software.