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Training-Free Anti-Recomputation

Updated 3 July 2026
  • Training-free anti-recomputation is a set of methods that reuses validated intermediate states to avoid redundant computations without retraining model internals.
  • It leverages strategies like C-VISION for early-stage pruning and C-PERSIST for prompt cache reuse, achieving up to 35.92× speedup on follow-up queries.
  • Quantum token schemes extend these techniques to randomized algorithms, enforcing single-use evaluations and enhancing cryptographic security.

Training-free anti-recomputation refers to techniques that prevent redundant computation in machine learning and classical randomized algorithms without requiring any retraining or modification of model internals. In contemporary applications, notably in video vision-LLMs (VLMs) and cryptographically protected algorithms, anti-recomputation focuses on systematic reuse of validated intermediate state or leveraging quantum primitives to enforce single-use evaluation, thereby yielding significant efficiency and security gains in various settings (Bastien et al., 5 May 2026, Gunn et al., 2024).

1. Anti-Recomputation in Video Vision-Language Pipelines

Video VLMs typically process video by sampling NN RGB frames, encoding each via a vision tower (e.g., a ViT encoder), assembling a combined video+text prefix for a LLM, and then performing answer generation via token streaming. Redundant work arises from two principal sources:

  • Recomputing vision-tower features for nearly unchanged frames (static backgrounds or minimal visual updates)
  • Re-running full prefix ingestion and KV cache filling when handling follow-up questions on the same video

FrameMogging introduces a training-free anti-recomputation scheme at two orchestrated stages:

  • C-VISION: Early-stage pruning that sparsifies or skips redundant vision-tower computation for static or predictable frames during fresh video ingestion.
  • C-PERSIST: After-ingest prompt reuse, directly recycling the LM's prefix cache and visual tokens when a query involves the same already-ingested video, subject to cache-validity checks and minimal K-frame repairs in cases of answer drift.

This architecture achieves substantive reductions in wall-clock latency and compute utilization, especially in follow-up queries that refer to the same video context (Bastien et al., 5 May 2026).

2. Formal Caching and Validation Mechanisms

Let FtF_t denote the visual features of frame tt post-vision tower, and PtP_t the LM's cached prefix state after ingesting frames 1…t1\ldots t and a query prompt qq. The combinatorial pipeline state is St≔(F1,…,Ft, Pt)S_t \coloneqq (F_1,\ldots,F_t,\,P_t). For any subsequent query, a binary validation function V(St,q)∈{0,1}V(S_t, q) \in \{0,1\} determines cache reuse.

A basic routing policy employs block-wise infinity-norm differencing and frame-age slicing: V(St,q)=1 if ∥It−It−1∥∞≤T and aget≤Amax;0 otherwiseV(S_t, q) = 1 \text{ if } \|I_t - I_{t-1}\|_\infty \leq T \text{ and } age_t \leq A_{max}; \quad 0 \text{ otherwise} where ItI_t is the image or region-pool, FtF_t0 a novelty threshold, and FtF_t1 a maximum cache age. Valid cache states admit immediate answer generation without full reencode; invalid states trigger local (K-frame) repairs or full recomputation. C-PERSIST relaxes validation: a cache is reused if the new query attaches to the same video context and the prefix remains untouched.

3. Quantitative Outcomes and Speedup Arithmetic

Empirical evaluation on frozen Qwen2.5-VL-7B-Instruct-4bit and Gemma 4-E4B-4bit shows the following:

Method First-Query Speedup Follow-Up Speedup Accuracy Drift
C-VISION (32f short) 1.316FtF_t2 n/a FtF_t3 = 0.000
C-PERSIST (adaptive) n/a 14.90–35.92FtF_t4 0/93 paired drift
C-PERSIST (raw/warm) n/a 47.2FtF_t5 (8f), 91.1FtF_t6 (16f) FtF_t7 = –0.048, 0.000

Notably, the follow-up reuse regime (C-PERSIST) achieves up to 35.92FtF_t8 speedup on follow-up queries with no paired choice or correctness drift over 93 queries; stress tests with 50 repeated-question cycles yield 0/343 drift. In contrast, first-query vision pruning (C-VISION) gives moderate speedup (up to 1.316FtF_t9) but is universally fidelity-preserving in the tested benchmarks (Bastien et al., 5 May 2026).

4. Stage-Share Ceiling: Compositional Limits on End-to-End Speedup

The realized end-to-end acceleration is bounded by the fraction of wall clock each stage occupies. The C-CEILING arithmetic quantifies the idealized gain when multiple pipeline stages are accelerated: tt0 where tt1 and tt2 are the fractional times spent in vision tower and prefix stages, and tt3, tt4 are their speedups, respectively. Gains are additive (in denominators), not multiplicative, preventing "super-headline" accelerations. For instance, multiplying a 1.316tt5 C-VISION acceleration by a 14.9tt6 C-PERSIST value would overstate the global performance gain, as their operational domains only partly overlap.

5. Training-Free Anti-Recomputation in Randomized Algorithms via Quantum Tokens

Quantum one-time token schemes provide a cryptographically enforced training-free anti-recomputation protocol applicable to any randomized classical function tt7 (Gunn et al., 2024). The core architecture involves:

  • Quantum Token Generation: A secret subspace tt8, encoded as a hidden-subspace state tt9.
  • Evaluation Protocol: An obfuscated circuit PtP_t0 verifies measurement tags derived from PtP_t1, generates per-query randomness PtP_t2 from hash PtP_t3, and evaluates PtP_t4.
  • One-Time Guarantee: Post-measurement, quantum no-cloning and authentication restrict adversaries to a single valid evaluation. Any subsequent invocation is provably prevented with negligible probability (bounded by PtP_t5 given sufficient output min-entropy PtP_t6).
  • Resource-Independence: The quantum token's size is PtP_t7 qubits, independent of PtP_t8; protection requires no quantum implementation of PtP_t9.

This method enforces anti-recomputation unavailable to classical wrappers, without retraining or model modification, and decouples security from model complexity.

6. Limitations and Open Directions

Current training-free anti-recomputation approaches possess inherent limits:

  • Frozen Architectures: All reported experiments are performed on frozen model stacks and standard planners; full codec-native routing (leveraging, e.g., motion vectors) remains unimplemented (Bastien et al., 5 May 2026).
  • Benchmark Coverage: Current test sets under-represent scenarios that stress cache integrity (e.g., heavy ego-motion, deadline-sensitive robotics).
  • Cache Prediction: Existing validation relies on pixel/block difference metrics; robust learned cache-validity predictors represent an open research area.
  • Composition Boundaries: Observed speedups are bottlenecked by the stage-share ceiling; end-to-end acceleration always saturates at the arithmetic limit set by time-share rather than simple multiplication of component gains.
  • Quantum Premises: Deployment of quantum tokens in practice is contingent on reliable quantum memory and oblivious circuit obfuscation.

A plausible implication is that the next generation of video processing interfaces may shift to "world state" streaming paradigms—background frames, object tracks, motion confidences—enabling VLMs to efficiently ingest "what changed" rather than recomputing on dense frame grids.

7. Future Directions and Generalizations

For video VLMs, further progress will depend on integrating true codec-native signal analysis, safe invalidation under adversarial or dynamic workloads, and generalized interface standards for world-state synchronization. For cryptographically-protected anti-recomputation, reducing quantum resource requirements and robustifying obfuscation against classical and quantum attacks remain active research problems (Gunn et al., 2024, Bastien et al., 5 May 2026).

The field is converging on a unifying principle: training-free anti-recomputation can be realized by judicious state reuse and, where necessary, physically or cryptographically binding evaluation to a single use per input, with practical and theoretical routes tailored to the domain's operational and security requirements.

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