Topological Insulator Field-Effect Transistors
- TIFETs are transistor architectures that modulate transport in topological insulator channels by switching between bulk conduction and surface states.
- They operate through electrostatic tuning or field-driven phase transitions, enabling the creation or removal of protected edge channels.
- These devices span diverse material systems and applications, offering capabilities from quantized switching to RF, THz, and spintronic functionalities.
Topological insulator field-effect transistors (TIFETs) are transistor architectures in which a gate modulates transport in a topological-insulator channel either by tuning the balance between bulk and topological surface conduction or by driving a topological phase transition that creates or removes protected edge channels. In the literature, the term encompasses back- and top-gated thin-film devices based on three-dimensional topological insulators, two-dimensional quantum spin Hall channels switched between topological and trivial phases, and more specialized proposals in which both logic states remain topological and quantized. Closely related terminology includes the topological quantum field-effect transistor (TQFET), whereas the strained topological insulator spin field-effect transistor is explicitly distinct because its gate action is mediated by strain-induced modulation of Dirac velocity and spin interference rather than electrostatic depletion or topological phase switching (Chang et al., 2012, Michetti et al., 2013, Collins et al., 2018, Fuhrer et al., 2022, Li et al., 2022, Bandyopadhyay, 2022).
1. Conceptual scope and operating principles
A central distinction in the TIFET literature is between electrostatically tuned TI-channel transistors and phase-transition TIFETs. In the first category, the gate shifts the Fermi level through bulk bands, the bulk band gap, and topological surface states, thereby changing whether transport is bulk-dominated or surface-dominated. This is the logic behind ambipolar nanostructure devices based on , dual-gate BiTe thin-flake transistors, gate-tunable Hall bars, and RF BiSe capacitor structures that attain a bulk depleted regime (Kong et al., 2011, Liu et al., 2011, Tian et al., 2014, Inhofer et al., 2017).
In the second category, the gate field changes the topological class of the channel. The canonical scheme is a switch between a quantum spin Hall or topological-insulator state, where helical edge channels conduct, and a conventional or normal insulator, where those channels disappear. This mechanism was proposed in HgTe/CdTe double quantum wells, monolayer $1T'$-TMDCs, and few-layer black phosphorus, and was later demonstrated experimentally in ultrathin NaBi through electric-field-driven gap closing and reopening (Michetti et al., 2013, Qian et al., 2014, Liu et al., 2014, Collins et al., 2018).
A third, more specialized branch replaces the usual metallic ON state and trivial OFF state with two topological conductance states. In the screw-dislocation proposal for three-dimensional topological insulators, a local Zeeman field switches a pair of dislocation channels between helical and chiral configurations, yielding and (Li et al., 2022). This corrects a common misconception that a TIFET must always switch between a topological conductor and a trivial insulator.
The related STI-SPINFET sharpens another conceptual boundary. It uses a strained three-dimensional topological insulator as a spin interferometer, with a gate voltage applied to a piezoelectric layer to modify the TI surface-state Dirac velocity and hence the interference between two spin eigenstates. The paper explicitly contrasts this with conventional TIFETs, which typically rely on electrostatic gating and often on topological phase switching in two-dimensional topological insulators (Bandyopadhyay, 2022).
2. Material systems and device architectures
The TIFET literature spans exfoliated flakes, epitaxial thin films, van der Waals heterostructures, quantum wells, nanoribbons, and defect-engineered crystals. Early experimental devices used conventional FET geometries with TI channels, such as Bi0Te1 thin flakes on highly doped Si/300 nm SiO2 with a 10 nm ALD Al3O4 top-gate dielectric, and 5 nanoplates on 300 nm SiO6/degenerately doped Si substrates (Liu et al., 2011, Kong et al., 2011). Subsequent work used 10 nm-thick 7 on insulating SrTiO8(111), hBN-encapsulated CVD-grown Bi9Se0 in a metal-dielectric-topological-insulator capacitor, HgTe quantum wells in transistor geometries, and dual-gate nanoribbon devices based on stanene or 1-MoS2 (Tian et al., 2014, Inhofer et al., 2017, Kadykov et al., 2018, Park et al., 6 Mar 2026, Park et al., 9 Mar 2026).
| Device family | Representative channel or stack | Gate-controlled effect |
|---|---|---|
| TI-channel FET | Bi3Te4, 5, 6 | Ambipolar transport, bulk suppression, surface-state enhancement |
| RF TI capacitor | hBN/Bi7Se8/hBN with Ti/Au gate/contact stack | Quantum capacitance and bulk depletion |
| Phase-transition TIFET | HgTe/CdTe DQW, ultrathin Na9Bi, few-layer phosphorene | TI/QSH 0 NI switching |
| 2D vdW TIFET | 1-MX2 with hBN spacers and top/bottom gates | Electric-field-driven topological phase transition |
| NC-TIFET | 3-MoS4 with HZO ferroelectric gate insulator | Negative-capacitance field amplification |
| Fully topological TFET | Screw dislocations in BaBiO5-class 3D TI | Helical/chiral quantized switching |
Architecturally, several recurring patterns appear. Dual-gate control is used when the relevant order parameter is an out-of-plane electric field or an inter-well bias, as in HgTe/CdTe double quantum wells, vdW TMDC stacks, and NC-TIFETs (Michetti et al., 2013, Qian et al., 2014, Park et al., 9 Mar 2026). Back-gating through SrTiO6 is favored when very high low-temperature capacitance is required to tune carrier density over large ranges (Tian et al., 2014, Chang et al., 2015). High-quality dielectrics are treated as decisive in surface-dominated TI channels: hBN enables measurable quantum capacitance in Bi7Se8, while ALD Al9O0 on Bi1Te2 demonstrated room-temperature top-gate modulation but also exposed the importance of precursor-dependent interface damage (Inhofer et al., 2017, Liu et al., 2011).
3. Electrostatics, depletion, and topological phase control
In three-dimensional TI channels, gate action is limited primarily by residual bulk carriers, surface asymmetry, and dielectric screening. The clearest RF electrostatic study is the hBN-encapsulated CVD Bi3Se4 capacitor, where 5 in an 8 nm film and the superior quality hBN dielectric allow access to a bulk depleted regime. The observed quantum-capacitance minimum near 6 V identifies a “purely Dirac regime” in which the top Dirac surface state reaches charge neutrality while the bottom surface Dirac cone remains charged and couples capacitively through the insulating bulk. In that framework,
7
and for a Dirac cone,
8
Using the Berglund integral to extract 9 from capacitance-voltage data, the work reports a Dirac velocity of about 0 m/s (Inhofer et al., 2017).
The same theme appears in transport-gated TI films. In 1 on SrTiO2(111), the low-temperature substrate capacitance is about 290 nF/cm3 at 1.4 K and drops to 5.3 nF/cm4 at 200 K, enabling carrier-density tuning by nearly two orders of magnitude and a gate-induced bulk metal-insulator transition (Tian et al., 2014). In 5 nanoplates, a Poisson estimate gives a depletion length 6 nm, and the paper explicitly states that suppression of bulk conduction requires the nanoplate to be much thinner than the depletion length (Kong et al., 2011). In Bi7Te8 dual-gate transistors, strong stoichiometric doping of about 9 prevents ambipolar inversion and makes interface quality central to electrostatic performance (Liu et al., 2011).
For phase-transition TIFETs, the crucial quantity is the critical electric field $1T'$0. In monolayer $1T'$1-MoS$1T'$2, one proposal gives $1T'$3 for the topological-to-trivial transition (Qian et al., 2014), whereas a cryogenic double-gate $1T'$4-MoS$1T'$5 device study gives approximately $1T'$6 for the chosen device parameters (Park et al., 9 Mar 2026). In ultrathin Na$1T'$7Bi, scanning tunneling spectroscopy resolves a field sequence in which the gap is around 400 meV at about 0.9 V/nm, reduces to roughly 200 meV by about 1.1 V/nm, becomes V-shaped and completely closed at about 1.5 V/nm, and reopens to about 100 meV by about 2.4 V/nm (Collins et al., 2018). In few-layer phosphorene, the transition occurs at about 0.3 V/Å for 4-layer phosphorene at the PBE level, about 0.55 V/Å for 3-layer phosphorene, and about 0.7 V/Å for 4 layers at the HSE06 level (Liu et al., 2014).
First-principles modeling has turned the determination of $1T'$8 into a methodological issue rather than a purely material constant. A DFT-only framework for 2D TIFETs argues that careful consideration of basis set and symmetry constraints is crucial for determining $1T'$9, that pseudo-atomic orbitals avoid the electron spilling problem more naturally than plane-wave calculations under strong perpendicular fields, and that symmetry constraints must be turned off to let inversion symmetry break physically under the applied field (Choi et al., 14 Mar 2026). This suggests that reported switching fields are inseparable from electrostatics, geometry, and numerical treatment.
4. Transport formalisms and channel diagnostics
Because TIFETs span surface-dominated TI transport, edge-state ballistic transport, and RF or THz admittance, their analysis has been correspondingly heterogeneous. In ambipolar TI transistors, low-field quantum interference is commonly fit by the Hikami-Larkin-Nagaoka expression
0
with 1. In 2, the extracted 3 evolves from about 0.5 in the bulk-dominated regime to about 1 near the charge neutrality point, which was interpreted as a change from one coupled coherent channel to two decoupled coherent channels associated with the top and bottom surfaces (Tian et al., 2014).
RF TI electrostatics use a different language. In the Bi4Se5 capacitor, admittance measurements up to 10 GHz are analyzed with a distributed RC-line model in series with a contact resistance, allowing simultaneous extraction of quantum capacitance and device resistance. The resistance rises strongly as the gate drives the system toward depletion, while the capacitance minimum directly tracks the low-density Dirac regime (Inhofer et al., 2017).
For device-level current-voltage simulation, the dominant framework is coherent ballistic transport. Bi6Se7 MOSFET simulations used a full-band tight-binding Hamiltonian in an atomic orbital basis extracted from DFT via maximally localized Wannier functions, coupled self-consistently to Poisson and propagated with a recursive scattering-matrix method in a ballistic, NEGF-style formalism (Chang et al., 2012). Stanene TIFET modeling uses the Kane-Mele Hamiltonian with field-induced staggered potential and Rashba terms, together with the nonequilibrium Green’s function method implemented in Kwant; the current is written in Landauer form as
8
The same study calculates the perpendicular field from a series-capacitor electrostatics model,
9
thereby linking gate bias directly to topological switching (Park et al., 6 Mar 2026).
In the fully topological screw-dislocation transistor, tight-binding quantum transport and the Landauer–Büttiker formalism are again used, now to count topological line modes under local Zeeman control (Li et al., 2022). In the first-principles ballistic framework for 2D TIFETs, the current is instead written in a band-velocity form over DFT-derived nanoribbon bands, with source- and drain-resolved occupation functions determined by the sign of the group velocity (Choi et al., 14 Mar 2026). Across these approaches, the recurrent diagnostic is not simply current suppression, but the correlation between gate bias and the appearance, disappearance, coupling, or quantization of edge or surface channels.
5. Performance metrics and switching regimes
The earliest TI-channel FET experiments established that field effect in TI materials is feasible but strongly conditioned by thickness, composition, and interfaces. In ultrathin 0 nanoplates about 5 nm thick, the resistance peak is about 50 times larger than the resistance at large 1, and the Hall coefficient changes sign at the resistance maximum, establishing graphene-like ambipolar gating in a topological-insulator channel (Kong et al., 2011). In Bi2Te3 dual-gate FETs, the highest simultaneous dual-gate modulation is 76.1% for the device fabricated with TMA/H4O ALD chemistry; the same work reports top-gate modulation and back-gate modulation at room temperature, but also emphasizes that interface non-ideality prevents the top gate from reaching the ideal electrostatic advantage expected from the thin high-5 dielectric (Liu et al., 2011). In back-gated 6, the transfer curve shows a resistance peak of about 12 k7 near the charge neutrality point and an on/off-like modulation of about 600%; the surface-to-bulk conductance ratio exceeds 50 below about 20 K in the fitted low-temperature regime (Tian et al., 2014).
Ballistic simulations of Bi8Se9 thin-film MOSFETs translate these electrostatic issues into conventional device metrics. For a 50 nm channel 1QL Bi0Se1 MOSFET, the maximum drain current is about 1.1 mA/2m at 3 V, the maximum-to-minimum current ratio exceeds 4, the subthreshold slope is about 65 mV/dec, DIBL is about 40 mV/V, and the transconductance reaches about 2.8 mS/5m near 6 V. For the 20 nm channel, the minimum current increases by about 7, the subthreshold slope worsens to about 110 mV/dec, DIBL becomes about 330 mV/V, and 8 at 9 falls to about 260 00A/01m (Chang et al., 2012).
Phase-transition TIFETs aim at different metrics. In ultrathin Na02Bi, the reported bulk gaps exceed 400 meV in the topological phase and exceed 100 meV in the reopened conventional phase, both well above room-temperature 03 meV; the paper therefore presents ultrathin Na04Bi as suitable for room-temperature topological transistor operation (Collins et al., 2018). In the TQFET framework, the ON state is the topological or QSH phase with “dissipationless helical conducting channels with a minimum value of the quantized conductance 05,” whereas the OFF state is a conventional insulator in which the minimum conductance drops to zero. The same work reports normalized subthreshold swing 06 in existing materials and 07 for functionalized Bi, motivating the negative-capacitance TQFET concept (Fuhrer et al., 2022).
The most stringent quantization proposal is the screw-dislocation device, where reversible field-switching gives 08 in the helical ON state and 09 in the chiral OFF state (Li et al., 2022). At the cryogenic end of the design space, the NC-TIFET based on 10-MoS11 and HZO is reported to achieve a sub-20 mV switching voltage for an on/off ratio of 12 at 13 K and 14 V, together with 15 at 16 V; the paper benchmarks this against an experimentally reported cryogenic HEMT value of about 0.8 S/mm (Park et al., 9 Mar 2026).
Not every TI-based field-effect concept is competitive as a logic switch. The STI-SPINFET gives only about 1.07:1 conductance on/off ratio in the presented numerical example, which the paper states is too poor to be useful as a switch, although it may serve as an extremely energy-efficient stand-alone frequency multiplier with 17 and energy dissipated 18 fJ in the worked example (Bandyopadhyay, 2022). This clarifies that TI-based gating and useful TIFET switching are not synonymous.
6. Functional extensions, misconceptions, and outstanding limitations
TIFET research has expanded well beyond DC transfer curves. The Bi19Se20 RF capacitor demonstrates simultaneous extraction of quantum capacitance and resistance up to 10 GHz and explicitly presents TI field control in the radio-frequency regime as a step toward RF devices (Inhofer et al., 2017). HgTe-based FETs have been used as THz detectors up to room temperature, with incident radiation at 292 GHz and 660 GHz, and at low temperature they reveal a resonance near 6.5 T associated with the avoided crossing of zero-mode Landau levels and a magnetic-field-driven topological phase transition (Kadykov et al., 2018). Top-gated TI-FETs based on Bi21Te22Se23 and Bi24Se25 operate at room temperature in the 0.265–0.375 THz range; the best responsivities are 0.1 V/W and 0.21 V/W, the minimum reported NEP is approximately 10 nW/26, and large-area transmission imaging was demonstrated at 0.33 THz with 20 ms pixel acquisition time, 400 × 700 pixels, and 27 (Viti et al., 2018).
Spin and magnetoelectronic functionality are equally prominent. The HgTe/CdTe double-quantum-well TIFET was proposed not only as a topological switch but also as a spin battery and an all-electrical probe of spin-polarization dynamics in metallic islands (Michetti et al., 2013). In Cr-doped Sb28Te29 on bottom-gated SrTiO30(111), gate voltage changes the two-dimensional carrier density from 31 at 32 V to 33 at 34 V and increases the anomalous Hall resistance from 24.1 35 to 40.8 36, while the coercive field remains almost identical and the Curie temperature for the 5 QL gate-tunable sample stays close to 37 K (Chang et al., 2015). This directly addresses the recurrent materials problem of preserving topological transport while independently tuning magnetotransport.
Several limitations recur across otherwise very different devices. In three-dimensional TIs, residual bulk doping, bottom-surface charging, and parallel conduction remain central obstacles; in the Bi38Se39 RF capacitor, the quantum-capacitance minimum is offset by the bottom-surface contribution, and the authors explicitly suggest dual-gating as a next step (Inhofer et al., 2017). In Bi40Te41, the same surface chemistry that enables uniform ALD Al42O43 nucleation also creates interface defects, with O44 causing more damage than H45O (Liu et al., 2011). In Bi46Se47 MOSFET simulations, the high dielectric constant of approximately 100 produces slow potential variation along the channel and severe short-channel effects, despite the nominal electrostatic integrity of a two-dimensional system (Chang et al., 2012).
For phase-transition devices, the main limitations are different. The stanene TIFET model shows that long channels are needed to suppress OFF-state tunneling from QSH source to QSH drain through the trivial channel barrier, and the required gate swing is on the order of 10 V with the ultrathin h-BN stack used in that study (Park et al., 6 Mar 2026). The screw-dislocation transistor requires selective local magnetic field application and controlled fabrication of dislocation pairs, while realistic devices must suppress unwanted surface contributions (Li et al., 2022). In 48-TMDC proposals, some compounds such as MoTe49 and WTe50 are semimetallic in the computed monolayer 51 phase, so additional strain may be needed to open a clean QSH gap, and stabilization of the 52 phase may require chemical, thermal, or mechanical control (Qian et al., 2014). The NC-TQFET literature is explicit that “there is no known material with the properties of the NC-TQFET channel we consider here,” making channel discovery the main unresolved issue (Fuhrer et al., 2022). First-principles transport modeling of monolayer 53-MoS54 further reports that the 55 needed for full switching is relatively large and that at 100 K and 300 K the current does not reach the off-current target within the explored voltage range (Choi et al., 14 Mar 2026).
The accumulated record therefore supports a precise but nonuniform definition of the field. A TIFET may denote a TI-material transistor that electrostatically suppresses bulk conduction and reveals surface transport, a topological transistor that switches by band inversion and edge-channel annihilation, or a more specialized device with quantized topological logic states. The shared requirement is not a single geometry or metric, but robust gate control over a channel whose transport is fundamentally organized by topological surface, edge, or defect states.