SPLite Decoder for 3D Hand Mesh Reconstruction

• SPLite Decoder is a hardware-conscious, graph-based neural network module that reconstructs 3D hand meshes using parallel spiral indexing and partial channel convolution.
• It speeds up inference by processing only a fraction of latent channels with SIMD operations, thereby reducing memory and arithmetic costs.
• Empirical results demonstrate a 28% speed-up over the MobRecon baseline and a 3.1× frame rate increase on edge devices like the Raspberry Pi.

The SPLite Decoder is a hardware-conscious, graph-based neural network module designed to efficiently reconstruct 3D hand meshes with competitive accuracy in resource-constrained environments. Conceived as the decoder component of the SPLite Hand architecture, its design responds to the unique challenges of edge deployment, emphasizing real-time inference, minimization of latency, and stringent memory budgets (Hao et al., 18 Oct 2025). SPLite builds on spiral-based mesh convolution methods but introduces architectural modifications—parallel vertex sampling and partial channel convolution—that substantially accelerate mesh decoding without noticeably impacting accuracy.

1. Architectural Foundation and Key Innovations

The SPLite decoder draws inspiration from spiral convolution operators, such as those used in SpiralNet, which traverse a mesh’s vertex neighborhood in a predetermined spiral order. Spiral convolutions traditionally execute vertex-by-vertex aggregation in sequence, resulting in high forward pass latency. SPLite circumvents this bottleneck by refactoring the traversal into a parallel indexing scheme, leveraging SIMD operations for concurrent processing of multiple vertices.

In addition to parallel vertex sampling, SPLite integrates partial channel convolution: it processes only one-quarter of the latent channels for each vertex. If the input feature for N mesh vertices is $V \in \mathbb{R}^{N \times C}$, the decoder restricts convolution to $V_{subset} \in \mathbb{R}^{N \times \frac{C}{4}}$, directly reducing memory access and arithmetic costs. This strategem is critical for the target deployment platforms, as it reduces floating-point operations and cache pressure while maintaining sufficient representational capacity for mesh reconstruction.

2. Performance and Computational Efficiency

The SPLite decoder’s efficiency gains are quantified through both frame-rate improvements and reductions in computational resource consumption. Integrating the parallel vertex sampling and partial channel convolution achieves a 28% speed-up over the MobRecon-tailored baseline and a 65% improvement over a full ResNet-18 model. On the Raspberry Pi 5 CPU (BCM2712 quad-core Arm A76), SPLite contributes to a system-wide 3.1× increase in inference frame rate.

Detailed benchmarking demonstrates that the module achieves this without degrading core reconstruction metrics: for example, the PA-MPJPE (Procrustes-Aligned Mean Per Joint Position Error) rises only marginally from 9.0 mm to 9.1 mm following quantization-aware training (QAT). In controlled operator-level ablations, SPLite reduces the parameter count by a factor of four (from 21K to 5K) and decreases decoding time from 0.78 ms to 0.72 ms per mesh (Hao et al., 18 Oct 2025).

3. Integration within the SPLite Hand Framework

The SPLite Hand architecture uses a sparsity-aware encoder (ResNet-18 backbone with sparse convolution) for initial 2D hand pose representation. The decoder receives features from a 2D-to-3D lifting step that utilizes camera intrinsic parameters to construct spatially aligned 3D features. The SPLite module then executes mesh graph decoding, reconstructing both the mesh and the hand keypoints.

Sparse convolution in the encoder exploits 86–89% sparsity in hand pose images, curtailing unnecessary computation for background pixels and streamlining input to the decoder. This preconditioning accentuates the decoder’s efficiency, ensuring only salient information reaches the mesh reconstruction stage.

4. Parallel Indexing and Partial Channel Convolution

At the core of the SPLite decoder is its support for parallel spiral indexing. Unlike the sequential process:

$$\text{FullConv:} \quad Y = f(\text{SpiralIndex}(V))$$

SPLite executes:

$$\text{SPLite:} \quad Y = f(\text{ParallelSpiral}(\text{Partial}(V)))$$

where $\text{Partial}(V)$ denotes the selection of one-quarter of the channels for each vertex and $\text{ParallelSpiral}(\cdot)$ is the re-engineered spiral indexing supporting SIMD execution. This design not only reduces memory access operations, but also aligns with compiler-level optimization—crucial for embedded hardware (e.g., Raspberry Pi family) featuring vectorized instruction sets.

5. Model Compression with Quantization-Aware Training

Quantization-aware training is employed to shrink network weights from full precision (FP32) to lower-bit integer formats. In the SPLite Hand system, this reduces total model size from 72 MB to 18 MB with negligible loss in prediction fidelity (PA-MPJPE rises by 0.1 mm). QAT ensures that the decoder maintains robust prediction even when operating under constrained memory and arithmetic precision typical of edge devices.

6. Empirical Comparison and Deployment Context

Relative to contemporaneous models such as MobileHand or transformer-based architectures, SPLite distinguishes itself by balancing accuracy and computational efficiency. Many competitive methods either forgo accuracy for speed or fail to operate in real time on edge devices. SPLite’s judicious design—parallel vertex processing and channel sparsification—delivers a robust trade-off, making it suitable for deployment in AR/VR and mobile environments where latency and energy are stringent constraints (Hao et al., 18 Oct 2025).

Additionally, the decoder’s reduced memory bandwidth and computational requirements make it especially appropriate for integration into broader systems demanding fast, reliable mesh-based hand pose estimation.

7. Summary Table: SPLite Decoder Features and Empirical Metrics

Property	SPLite Decoder Module	Comparison Baseline
Parallel Spiral Indexing	SIMD-enabled	Sequential traversal
Channel Usage per Vertex	25% (partial)	100% (full-channel)
Parameter Count	5K	21K (SpiralConv++)
Inference Time (per mesh)	0.72 ms	0.78 ms
Frame Rate (RPi 5)	+3.1×	1× (MobRecon)
PA-MPJPE (FreiHAND)	9.0–9.1 mm	Comparable
Model Size (QAT, FP32 → INT)	72 MB → 18 MB	–

8. Significance and Context

The SPLite decoder’s design exemplifies a paradigm focused on computational pragmatism for mesh-based pose estimation: a high-throughput module tailored for mesh graphs, tuned for modern edge hardware, and empirically validated for real-world AR/VR deployment. Its architectural choices—parallelized spiral traversals and channel decimation—represent concrete responses to the time-memory-energy trilemma intrinsic to embedded AI. The introduction of quantization-aware training in the full pipeline further highlights the system’s robustness, as accuracy is retained amid aggressive weight compression.

A plausible implication is that the SPLite decoder’s principles—particularly parallel graph convolution and selective feature processing—may generalize to other lightweight geometric deep learning contexts, pointing to future decoder designs that maintain state-of-the-art accuracy at a fraction of standard computational costs.

The SPLite decoder thus serves as a contemporary benchmark in practical neural mesh decoding, delineating rigorous standards for future edge-deployed, graph-based inference frameworks (Hao et al., 18 Oct 2025).