Spin PN Junctions: Mechanisms & Applications
- Spin PN junctions are semiconductor interfaces with inherent spin selectivity, leveraging magnetic properties and spin-split bands to control charge and spin currents.
- They harness mechanisms such as spin-dependent recombination, spin-selective tunneling, and spin–orbit coupling to achieve rectification, amplification, and switching of spin signals.
- Applications range from graphene-based spin interferometers and topological-insulator diodes to magnetic tunnel junction devices, though challenges like thermal stability and fabrication remain.
Searching arXiv for relevant papers on spin PN junctions and closely related architectures. Spin PN junctions are p–n junctions or pn-like interfaces in which spin becomes an active transport variable through spin-split band edges, spin-dependent recombination, spin-selective tunneling, spin–orbit coupling, spin–momentum locking, or depletion-controlled spin transport. In current usage, the term spans several technically distinct objects: magnetic semiconductor junctions that rectify charge and magnetization, quantum Hall tunnel diodes in which spin selection rules replace an electrostatic depletion barrier, graphene and topological-insulator interfaces that convert chirality or Klein filtering into spin manipulation, and semiconductor Hall structures in which a reverse-biased depletion front amplifies spin-to-charge readout (Jiao et al., 3 Mar 2026, Eisenstein et al., 2017, Bercioux et al., 2023, Ilan et al., 2014, Nádvorník et al., 2016).
| Platform | Spin-selective ingredient | Representative signature |
|---|---|---|
| Circular graphene pn junction | Rashba SOC, Zeeman coupling, chiral zero modes | Sweet spot with fully in-plane, radially polarized spin (Bercioux et al., 2023) |
| 3D TI pn junction | Spin–momentum locking and chiral mode network | Mach–Zehnder conductance (Ilan et al., 2014) |
| Magnetic p-AMS/n-Si junction | Exchange-split p-AMS and space-charge modulation | at mA (Jiao et al., 3 Mar 2026) |
| FGT/p-GaSe/n-InSe/FGT junction | Built-in depletion field and spin-dependent tunneling | Zero-bias SVE at $35$ K (Zhu et al., 4 Sep 2025) |
| Quantum Hall spin diode | Spin-conserving tunneling and Pauli blocking | at $50$ mK (Eisenstein et al., 2017) |
1. Definition and conceptual scope
In the magnetic-semiconductor formulation, a spin p–n junction is a semiconductor junction in which at least one side is magnetic, causing spin-dependent band structure and transport so that the device rectifies, switches, and amplifies both electrical charge and spin signals. The canonical charge relations remain the usual p–n expressions,
and
but the transport variables become spin resolved through
0
with a spin continuity equation containing spin relaxation time 1 and spin diffusion length 2 (Jiao et al., 3 Mar 2026).
A more explicit magnetic-semiconductor construction introduces spin-split conduction and valence edges,
3
which produce spin-dependent built-in barriers
4
and similarly for holes,
5
In this picture, the depletion region is still central, but the built-in potential is spin selective rather than purely electrostatic (Xue et al., 21 Sep 2025).
A common misconception is that the term always implies a conventional depletion-layer diode. The quantum Hall realization instead treats a “Spin PN Junction” as a two-terminal element in which the roles of p- and n-type regions are played by layers with opposite spin magnetizations at the Fermi level. Rectification then arises from spin-conserving tunneling and Pauli blocking rather than minority-carrier recombination across a depletion barrier (Eisenstein et al., 2017). This broader usage is now intrinsic to the literature.
2. Spin-selective transport mechanisms
In magnetic-semiconductor homojunction theory, the central microscopic ingredient is spin-dependent recombination. A spin-resolved Shockley–Read–Hall channel is written as
6
with lifetimes
7
and an exponential recombination probability
8
Because 9 depends exponentially on the spin-split interband separation, the effective lifetime 0 acquires exponential field sensitivity, leading to
1
and a reported near-100× enhancement in magnetoresistance sensitivity under small forward bias (Xue et al., 21 Sep 2025).
A different mechanism operates in the room-temperature magnetic p-AMS/n-Si junction. There, the ferromagnetic p-AMS hosts extended, spin-polarized hole states, and the space-charge region acts as a spin-selective modulator. Forward bias is dominated by majority hole drift, small reverse bias by minority electron drift, and reverse breakdown by electron tunneling from spin-polarized Co valence states in p-AMS into n-Si. The device-specific DPC/iDPC profile yields a “triplet built-in electric field state” with negative charges concentrated at the interface and weaker positive charge accumulations on both sides; this barrier asymmetry governs the direction-dependent spin response (Jiao et al., 3 Mar 2026).
A third mechanism appears in two-dimensional magnetic tunnel p–n junctions based on FGT/p-GaSe/n-InSe/FGT. Here the depletion-region field itself produces asymmetric spin diffusion at zero external bias. The interfacial tunneling probabilities satisfy
2
while the steady-state spin density follows
3
Under open-circuit conditions the net charge current vanishes but a finite spin accumulation remains, with spin voltage
4
DFT-informed drift-diffusion modeling gives an interfacial energy difference 5 meV for 5 nm GaSe/5 nm InSe and a predicted measurable voltage difference between antiparallel and parallel states of 6V, in the same order as observed (Zhu et al., 4 Sep 2025).
These mechanisms are not interchangeable. Some devices are recombination limited, some are tunneling limited, some are drift-diffusion limited, and some are governed by topological selection rules. The unifying feature is not a single transport equation, but spin-selective asymmetry built into the junction.
3. Graphene realizations
The most explicit graphene spin PN junction in the supplied literature is the circular junction defined by
7
with a p-doped dot for 8, an n-doped region for 9, and a perpendicular magnetic field. The low-energy Hamiltonian is
0
augmented by
1
Projection onto the spin-degenerate zero-energy radial state at the interface yields the effective one-dimensional Hamiltonian
2
or, in the original basis,
3
The zero-mode dispersion is
4
The crucial result is the exact sweet spot
5
at which the spin is fully in-plane and radially polarized for any 6. The corresponding interferometric conductance phase is
7
so at the sweet spot 8 and the Berry phase reaches 9 without requiring large Rashba SOC. This is the paper’s “shortcut” relative to semiconductor Rashba rings, where in-plane alignment typically requires 0 (Bercioux et al., 2023).
A complementary graphene result concerns gradual pn junctions with intrinsic SOC, Rashba SOC, and stagger potential,
1
In the negligible-Rashba regime the uniform-spectrum mass is
2
and the WKB transmission becomes
3
At 4, sweeping the stagger potential produces two Gaussian peaks,
5
one per valley. The paper emphasizes that this enables valley detection without double-interface resonant devices. It also states that with intrinsic SOC only, 6; spin–valley coupling does not by itself produce a net spin-polarized total conductance when 7 (Yang et al., 2016).
Taken together, these graphene results show two distinct spin PN junction regimes: curved, chiral, Landau-quantized interfaces whose zero modes act as spin interferometric channels, and smooth one-dimensional pn barriers whose SOC-modified masses encode valley-resolved transmission.
4. Topological-insulator pn junctions
In a 3D topological-insulator film, a p–n junction under perpendicular magnetic field reconfigures the chiral surface-mode network into a Mach–Zehnder interferometer. The surface Dirac Hamiltonian is
8
and the slab representation can be written as
9
Because the top and bottom surfaces carry opposite half-integer Hall responses in the $35$0 Landau level, gating one half of the film from n to p creates two coherent paths on the top and bottom surfaces. The beam splitters are spin rotations,
$35$1
the path transfer matrix is
$35$2
and the conductance becomes
$35$3
The paper describes the visibility as virtually perfect and identifies the same structure as a spin filter, because the path is tied to the direction of spin propagation by spin–momentum locking (Ilan et al., 2014).
A distinct topological-insulator pn junction appears in the analysis of nanomagnetic switching on a 3D TI surface. There, the junction acts as a gate-tunable angular filter based on Klein tunneling. Reflection at the pn barrier suppresses charge current while modifying the spin distribution on the TI surface. Using NEGF quantum kinetic modeling, the work finds an intrinsic longitudinal spin-to-charge ratio on the TI surface that can exceed unity and reach $35$4. However, it also states that this does not translate into external gain when the nanomagnet is the source contact, because the injected interfacial spin current remains bounded by the total charge current, with $35$5. The surface current density itself is limited by the TI bulk band gap; for Bi$35$6Se$35$7 at 0.2 V bias, the current localized within approximately the top 2 nm carries only approximately 30% of the total current (Vakili et al., 2021).
This distinction is important. A large intrinsic spin response on a Dirac surface does not automatically imply large spin torque on an attached ferromagnet. In the TI literature, the pn junction is simultaneously a momentum filter, a spin filter, and a constraint imposed by bulk shunting.
5. Magnetic semiconductor and magnetic tunnel junction implementations
The room-temperature magnetic p–n junction diode based on p-type amorphous magnetic semiconductor and n-type Si is a direct charge-and-spin diode realization. The p-AMS is oxygenated Co–Fe–Ta–B, specifically p-type CoFeTaBOx with $35$8 and a variant with $35$9, deposited by RF magnetron sputtering; the main vertical devices are In/p-AMS (0 nm)/n-Si (1m)/In. The p-AMS is single-phase amorphous, shows robust ferromagnetism with Curie temperature exceeding 600 K, and forms a space-charge region on the p-AMS side of width 2 nm. The diode has turn-on voltage 3 V at 300 K, increasing to 4 V at 200 K and 5 V at 100 K, and reverse breakdown at 6 V. Magnetization is modulated by current alone, with 7 at 8 mA and 300 K under 50 Oe, 9 at $50$0 mA and 0 Oe, and a giant enhancement to $50$1 at $50$2 mA. Thin p-AMS-0.55 on highly conducting n-Si reaches saturation magnetization $50$3 emu/cm$50$4, a 29-fold increase relative to p-AMS-0.55/p1 (Jiao et al., 3 Mar 2026).
The van der Waals magnetic tunnel p–n junction FGT/p-GaSe/n-InSe/FGT realizes a different operating point: zero-bias spin-voltage generation rather than current-driven magnetic switching. The semiconductor spacer is a p-GaSe/n-InSe junction with typical thicknesses of GaSe 5–15 nm and InSe 5 nm, with the strongest effect in 5 nm GaSe + 5 nm InSe. No separate crystalline tunnel barrier is inserted; the depletion region itself acts as the tunneling and built-in-field barrier. The active overlap area is approximately $50$5m$50$6, and the device is encapsulated by approximately 15 nm hBN. The zero-bias spin-voltage effect is defined as
$50$7
and reaches $50$8 at 35 K in an FGT/p-GaSe(5 nm)/n-InSe(5 nm)/FGT device, with persistence from 10 K up to $50$9 K. The effect decreases as GaSe thickness increases, vanishes at 15 nm GaSe with 5 nm InSe, and is absent at zero bias in devices containing only a single p- or n-type spacer layer (Zhu et al., 4 Sep 2025).
A third strand is theoretical: magnetic semiconductor homojunctions with spin splitting-induced band offsets. In this model, the forward-bias current remains Shockley-like but the saturation current inherits exponential sensitivity through spin-dependent recombination probabilities. The same framework predicts magnetically tunable circularly polarized luminescence,
0
with near-half polarization when only one band is split in both neutral regions. Under reverse bias it further predicts a “spin Zener filter,” with spin-resolved tunneling
1
and, for 2-like parameters, a 3 V window where 4 (Xue et al., 21 Sep 2025).
These three cases illustrate the breadth of magnetic spin PN junctions: one is a room-temperature charge-and-spin diode on Si, one is a zero-bias spin-voltage tunnel junction in an atomically thin heterostructure, and one is an extended Shockley design paradigm for magnetoresistance, polarized emission, and Zener filtering.
6. Quantum Hall and depletion-front semiconductor realizations
The quantum Hall spin diode is implemented in a GaAs/AlGaAs double-layer 2DES with two 18 nm GaAs quantum wells separated by a 10 nm Al5Ga6As barrier and center-to-center spacing 7 nm. Independent density tuning sets one layer to 8 and the other to 9 in the 0 Landau level, giving antiparallel spin magnetizations at the Fermi level. Spin-conserving tunneling is allowed for one bias polarity and Pauli blocked for the other. Experimentally, the antiparallel configuration shows a forward-bias peak at 1 mV, a very weak reverse peak at 2 mV, and reverse peak current below 1% of the forward peak at 50 mK. The rectification ratio
3
satisfies 4 at 50 mK near the resonance. The exchange-driven spin-flip alignment energy is 5 meV, much larger than the bare Zeeman energy 6 meV at 7 T. The diode character degrades rapidly with temperature because thermally excited long-wavelength spin waves populate opposite-spin states and lift Pauli blocking (Eisenstein et al., 2017).
A very different semiconductor implementation uses a reverse-biased planar pn junction in a GaAs/AlGaAs Hall-bar microdevice to amplify the inverse spin Hall effect. The p-region is a carbon-doped GaAs cap, the n-region is the underlying 2DEG, and reverse bias expands the depletion zone laterally into the Hall bar by at least approximately 8m at 10 K. Three Hall crosses are placed at 2, 5, and 8 9m from the pn edge, and the depletion front can be moved through them sequentially. When the depleted zone reaches a Hall cross, the transverse spin Hall voltage 00 increases abruptly by more than an order of magnitude; at the same dc current 01A, 02 is amplified by a factor 03 in the depleted regime relative to the normal regime. The average drift field rises from 04 V m05 in the undepleted regime to 06 V m07 in the depleted regime, while the conductivity drops from 08 to 09. The inferred spin lifetime is 10 ps and the effective spin Hall angle decreases from 11 to 12 even as the measured voltage increases (Nádvorník et al., 2016).
These two examples clarify a useful distinction. In the quantum Hall device, “spin PN junction” refers to a diode defined by spin-resolved tunneling asymmetry. In the planar Hall-bar device, the pn junction acts as a local electrostatic gate that amplifies spin-to-charge conversion by moving a depletion front. Both belong to the same topic because both use pn electrostatics or a pn analogue to control spin selectivity, but the transport observables are fundamentally different.
7. Applications, limitations, and open questions
The application space is correspondingly heterogeneous. Circular graphene pn junctions were proposed as spin interferometers exploiting the sweet spot for robust, low-RSOC manipulation of spin geometric phases and in-plane textures, as spin filters/selectors using polarity to choose inward versus outward radial spin orientation, and as reconfigurable spin waveguides based on gate-defined curved pn channels and chiral zero modes (Bercioux et al., 2023). The room-temperature p-AMS/n-Si junction suggests spin logic and reconfigurable diodes with magneto-rectification and gain under reverse bias, nonvolatile or memory-adjacent functions via current-induced magnetization states, and hybrid charge–spin circuits enabling in-memory computing primitives or neuromorphic elements (Jiao et al., 3 Mar 2026). The 2D FGT/GaSe/InSe/FGT junction suggests nonvolatile memory elements, low-power spin logic and amplification, spin interconnects, and magnetic sensors, specifically because the readout occurs at zero bias or at nA-scale bias currents (Zhu et al., 4 Sep 2025). The quantum Hall spin diode functions as a spectroscopic probe of spin polarization in correlated 13 Landau-level states such as 14 and 15 (Eisenstein et al., 2017).
The limitations are equally platform specific. In curved graphene pn junctions, the analysis assumes a continuum Dirac model, circular symmetry, and adiabatic projection that neglects RSOC-induced coupling to higher Landau levels; valley-Zeeman SOC shifts 16 and spoils exact in-plane alignment unless 17 (Bercioux et al., 2023). In TI pn junctions, the surface spin response is limited by bulk shunting once the applied bias exceeds the bulk gap; the intrinsic conversion can remain large while the usable interfacial torque stays bounded by the surface current density (Vakili et al., 2021). In the p-AMS/n-Si diode, AMS composition control, interface quality, long-term reliability under repeated breakdown-current cycles, direct measurement of 18, 19, and 20, and integration beyond indium contacts remain open engineering issues (Jiao et al., 3 Mar 2026). In the vdW magnetic tunnel p–n junction, the effect is thickness sensitive, decreases with increasing resistance-area product, and is presently limited by the Curie temperature of FGT, so room-temperature operation requires higher-21 2D ferromagnets or alternative spin-control mechanisms (Zhu et al., 4 Sep 2025). In the quantum Hall diode, strong rectification requires high mobility, weak effective Landau-level mixing, and cryogenic temperatures; long-wavelength spin waves degrade the diode above approximately 0.1–0.5 K (Eisenstein et al., 2017).
Several open questions recur across platforms. The graphene work explicitly identifies robustness of the sweet spot to disorder and shape imperfections, valley mixing at sharper interfaces, and dynamic control of 22 via time-dependent gates as unresolved (Bercioux et al., 2023). The p-AMS/n-Si work raises questions about thermal behavior under sustained breakdown currents and thickness scaling near the 23 nm space-charge width (Jiao et al., 3 Mar 2026). The vdW tunnel junction literature leaves wafer-scale growth, controlled doping in ultrathin GaSe/InSe, and CMOS back-end compatibility as open challenges (Zhu et al., 4 Sep 2025). A plausible implication is that “spin PN junctions” are better regarded as a design class than as a single device archetype: the common element is a junction-induced asymmetry that acts differently on distinct spin channels, while the microscopic realization may be recombinative, tunneling, topological, interferometric, or depletion controlled.