PASTA-Formatted Fault Trees

• PASTA-formatted fault trees are a DAG-based formal language using Boolean gates to represent fault diagnostic logic in complex systems.
• The DSL integrates human-in-the-loop multi-agent pipelines to transform unstructured regulations into executable and verifiable automation workflows.
• Quality metrics such as topological consistency and semantic fidelity, along with evolutionary optimization via AlphaEvolve, ensure reliability and maintainability.

PASTA-formatted fault trees are a formal representation of fault diagnostic logic designed for automation, verification, and workflow synthesis in complex domains such as power-grid fault analysis. PASTA (Process-and-Analysis Specification for Tree-based Automation) is a domain-specific language (DSL) and associated execution semantics that enable the extraction, structuring, and optimization of both regulatory and expert-sourced reasoning about faults into a unified, machine-readable intermediate form. Within the Fault2Flow system, PASTA plays a central role as a canonical, verifiable, and executable abstraction between unstructured textual regulations, mind-map intermediate representations, and fully synthesized automation workflows (Wang et al., 17 Nov 2025).

1. Semantic and Structural Foundations

At its core, a PASTA fault tree is a rooted directed acyclic graph (DAG). The graph’s leaves are primary events or basic events: Boolean-valued, atomic conditions typically representing direct measurements or expert-specified predicates (e.g., “C₂H₂/C₂H₄ < 0.1”). Interior nodes are logical gates encoding Boolean functions over their arguments. The unique top node represents the “top event” or undesired system outcome (e.g., a system-level failure).

The semantics of the PASTA elements are as follows:

• BasicEvent: An indivisible proposition (e.g., a measurable physical relationship).
• PrimaryEvent: A wrapper for a basic event or an external input. Both are treated atomically, $E_i \in \{0,1\}$.

Supported logical gates in the profile for power-grid FTA:

• AND: $F_{AND}(E_1,...,E_n) = E_1 \land ... \land E_n$
• OR: $F_{OR}(E_1,...,E_n) = E_1 \lor ... \lor E_n$
• PAND (Priority AND): A sequential-AND evaluated true only if $E_1,...,E_n$ occur in order within a window $\Delta t$.
• NOT: $F_{NOT}(E) = \neg E$

Extensions such as XOR, K-out-of-N, and conditioned gates are present in the grammar but not used in the power-grid safety profile (Wang et al., 17 Nov 2025).

2. Formal Grammar and Syntax

The PASTA DSL is defined by a compact BNF grammar, promoting machine parsing and synthesis. The central constructs are events (atomic nodes) and gates (combinatorial logic). Each event or gate is a node; edges correspond to gate arguments. The full DSL is outlined as:

<faulttree> ::= "faulttree" <identifier> "{" <node_list> "}" <node_list> ::= <node> | <node> <node_list> <node> ::= <event_decl> | <gate_decl> <event_decl> ::= "event" <identifier> ":" <event_type> <params> <event_type> ::= "BasicEvent" | "PrimaryEvent" <params> ::= "(" <cond_list> ")" <cond_list> ::= <condition> | <condition> "," <cond_list> <condition> ::= <identifier> <relop> <number> <relop> ::= "<" | "≤" | "=" | "≥" | ">" <gate_decl> ::= "gate" <identifier> "=" <gate_type> "(" <arg_list> ")" <gate_type> ::= "AND" | "OR" | "PAND" | "NOT" <arg_list> ::= <identifier> | <identifier> "," <arg_list>

Edges are implicit: if a gate $G$ lists $E_1, E_2$, then there are edges $E_1 \to G$ and $E_2 \to G$. The top event is the node not referenced as an argument.

3. Human-in-the-Loop Multi-Agent Construction Pipeline

Fault2Flow operationalizes the transition from unstructured textual regulations and expert knowledge to executable workflows through a multi-agent, human-in-the-loop (HITL) pipeline. Each agent in the system is responsible for a stage in the pipeline, with interleaved human verification at critical junctures for quality control and domain supervision.

Pipeline overview:

1. Document Parsing: PDF extraction to Markdown using a dedicated agent.
2. Mind Map Generation: Markdown to mind-map via LLM, with human verification and editing.
3. Fault Tree Translation: Mind-map to PASTA DSL using another LLM agent, followed by human verification.
4. PASTA Optimization: Iterative improvement via AlphaEvolve (optional), subject to human acceptance.
5. Workflow Synthesis: Generation of n8n-executable workflow from verified PASTA code.
6. Workflow Verification: Closed-loop test-case generation and functional checking, automating refinement until fidelity constraints are satisfied.

The following pseudocode outlines the pipeline logic precisely as used in (Wang et al., 17 Nov 2025):

doc_text = PDFExtractionAgent.parse(pdf_file) mind_map_raw = MindMapAgent.generate(doc_text) mind_map = Human.verify_and_edit(mind_map_raw) pasta_raw = FaultTreeTranslationAgent.translate(mind_map) pasta_verified = Human.verify_and_edit(pasta_raw)

This suggests the framework maximizes both automation and reliability by integrating human domain expertise at each transformation step.

4. Worked Example: Transformer “Three-Ratio” Diagnosis

A representative application is the codification of transformer dissolved gas analysis (DGA) diagnostic logics into a PASTA fault tree. For a three-ratio diagnostic:

• $R_1$: $\text{C}_2\text{H}_2/\text{C}_2\text{H}_4 < 0.1$ (Thermal)
• $R_2$: $\text{CH}_4/\text{H}_2 < 0.3$ (Thermal)
• $R_1 > 0.1 \land R_2 < 0.1$ (Partial Discharge, PD)
• $R_3$: $\text{C}_2\text{H}_4/\text{C}_2\text{H}_6 > 1.5$ (Arcing)

The corresponding PASTA DSL is:

faulttree DGA_ThreeRatio { event R1_low : BasicEvent(C2H2_C2H4 < 0.1) event R2_low : BasicEvent(CH4_H2 < 0.3) event R1_high : BasicEvent(C2H2_C2H4 > 0.1) event R2_high : BasicEvent(CH4_H2 >= 0.1) event R3_high : BasicEvent(C2H4_C2H6 > 1.5) gate Thermal = AND(R1_low, R2_low) gate PD = AND(R1_high, R2_high) gate Arcing = OR(R3_high) gate TopEvent = OR(Thermal, PD, Arcing) }

Its hierarchical formula: $$\text{TopEvent} = \operatorname{OR}(\operatorname{AND}(R1\_low, R2\_low), \operatorname{AND}(R1\_high, R2\_high), R3\_high)$$, precisely mirrors the structured diagnostic logic (Wang et al., 17 Nov 2025). This unambiguously encodes operational decision criteria in a format amenable to both automated verification and downstream code generation.

5. Quality Metrics: Topological Consistency and Semantic Fidelity

Two quantitative metrics are foundational in ensuring that the constructed workflows faithfully implement the intended diagnostic logic:

• Topological Consistency (TC): Compares edge sets of the PASTA tree ($E_{PASTA}$) and the synthesized workflow graph ($E_{WF}$):

$TC = \frac{|E_{PASTA} \cap E_{WF}|}{|E_{PASTA}|}$

Grammar-based checking and enforcement of $TC = 1.00$ is integral, with any discrepancy triggering iterative refinement.

• Semantic Fidelity (SF): Assesses the logical equivalence of the workflow and the PASTA reference on all test cases derived from root-to-leaf paths:

$$SF = 1 - \frac{\#\{\text{workflows that differ from PASTA on any test case}\}}{|\mathcal{P}_{ref}|}$$

The Workflow Verification Agent generates test assignments and ensures output parity; iterations continue until $SF = 1.0$.

Proof sketches in (Wang et al., 17 Nov 2025) detail that the one-to-one mapping at the syntactic and adjacency matrix level, as well as exhaustive path-based logical checking, guarantee both TC and SF under this methodology.

6. AlphaEvolve: Evolutionary Optimization over Fault Trees

AlphaEvolve is an evolutionary optimization module operating directly on PASTA code. Each tree is considered a candidate “program” with fitness evaluated along two axes:

• Logical validity $f_v$: Binary, 1 if the tree is a fully reachable, syntactically valid DAG, 0 otherwise.
• Readability $f_r$: Normalized over tree line-count and nesting depth.

The optimization procedure includes multi-island evolution, elite archiving, inspiration sampling from top performers, LLM-driven mutation, and periodic migration. The fitness function $F = \alpha f_r + (1-\alpha)f_v$ balances the two criteria. The process iterates until convergence. In the transformer case paper, AlphaEvolve reduced node duplication by 12% and average depth by 1.7 levels without sacrificing validity (Wang et al., 17 Nov 2025). This suggests improved maintainability and interpretability of resulting trees, important for real-world automation scenarios.

7. Significance and Transferability

PASTA-formatted fault trees unify unstructured text, expert judgment, and executable automation in a verifiable and auditable representation. Their formal grammar, explicit Boolean semantics, and integration into a HITL multi-agent workflow pipeline permit seamless translation from regulatory documentation to operational code. The DSL and self-checking algorithms guarantee structural and logical fidelity, while evolutionary refinement yields concise, maintainable representations. The methodology and notation, as codified in (Wang et al., 17 Nov 2025), are directly transferable to other FTA domains, provided events and gates are suitably specified. A plausible implication is that domains with complex, evolving logic and the need for auditability will particularly benefit from the PASTA-Fault2Flow approach.