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Overlap-Channel Polyphase Synthesis Filter Bank

Updated 13 June 2026
  • OC-PSB is a filter bank technique that densely synthesizes channels using overlapping polyphase filtering and IFFT methods to minimize spectral leakage.
  • It employs a dual polyphase synthesis approach with even–odd channel interleaving to halve channel spacing and enhance frequency resolution for broadband applications.
  • OC-PSB supports high-fidelity signal processing in radio astronomy and MKID readout systems by offering >100 dB stopband attenuation and minimal in-band ripple.

An Overlap-Channel Polyphase Synthesis Filter Bank (OC-PSB) is a digital signal processing structure that generates densely spaced frequency channels with minimal spectral leakage, critical for high-fidelity time–frequency manipulation in broadband sensor arrays and wideband detector readout systems. OC-PSB inherits from the classical polyphase synthesis filter bank, extending it by producing interleaved (“overlapping”) sub-bands at half the original channel spacing, thereby substantially increasing channel density and spectral flexibility without sacrificing real-time implementability or dynamic range. OC-PSB architectures have been deployed in radio astronomy (e.g., MWA for time-resolved pulsar studies) and submillimeter-wave detector systems (e.g., Prime-Cam/FYST with large MKID arrays) (McSweeney et al., 2020, Ruixuan et al., 1 Feb 2025).

1. Mathematical and Algorithmic Formulation

The OC-PSB synthesizes a densely comb-spaced set of output channels from PP complex baseband streams by leveraging IFFT-based synthesis and polyphase finite impulse response (FIR) filtering. Starting from a real prototype filter h[n]h[n] of length NhN_h, the filter is decomposed into PP polyphase subfilters: hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-1 with L=Nh/PL = N_h/P. In the critically sampled PSB, PP input streams Xp[n]X_p[n] are synthesized by IFFT and polyphase filtering; the OC-PSB generalizes this by running two PSBs offset by half the channel spacing. The “odd” channels are constructed by multiplying IFFT input bins at odd indices by 1-1, achieving a 180180^\circ phase flip.

For output channels h[n]h[n]0: h[n]h[n]1 where h[n]h[n]2 is the output of the h[n]h[n]3-point IFFT. The final time-domain stream is

h[n]h[n]4

This achieves twice the channel density (h[n]h[n]5 channels) and half the channel spacing: h[n]h[n]6 where h[n]h[n]7 is the system sample rate. The same approach can be inverted (as in the MWA) to recover high time-resolution signals from channelized data via a dual polyphase synthesis stage (McSweeney et al., 2020, Ruixuan et al., 1 Feb 2025).

2. Filter Design, Channel Structure, and Parameters

The prototype filter’s window function, length, and polyphase decomposition are central to controlling bandwidth, transition width, and stopband performance. For example, the Prime-Cam/FYST OC-PSB uses a 4-term Blackman–Harris windowed prototype of length h[n]h[n]8 (16,384) taps, yielding polyphase subfilters of length h[n]h[n]9 for NhN_h0. In this configuration:

Parameter Value
Polyphase branches (NhN_h1) 1,024
Output channels NhN_h2 2,048
Prototype filter length NhN_h3 16,384
Polyphase subfilter length NhN_h4 16
Channel spacing (NhN_h5) 125 kHz (for NhN_h6 MHz)
Transition bandwidth NhN_h7 kHz
Stopband attenuation NhN_h8 dB
In-band ripple NhN_h9 dB

The “overlap factor” (2×) expresses the doubling of output channel density due to the interleaved even–odd channel structure.

3. Hardware Architecture and Implementation

Modern OC-PSB implementations are typically deployed on FPGAs or RFSoC platforms. For example, the Prime-Cam OC-PSB utilizes the Xilinx ZCU111 platform’s RFSoC, exploiting:

  • Vector-rotation CORDIC-based DDS to generate PP0 TDM baseband tones.
  • A PP1-point streaming IFFT creates simultaneous synthesized tones.
  • Block RAM acts as a reorder buffer to implement cyclic channel alignment and overlap–add.
  • PP2-path polyphase FIR bank applies the prototype filtering.
  • The overall DSP chain runs at PP3 MHz core clock, scalable up to PP4 GHz by instantiating parallel chains and interleaving outputs.

Resource utilization includes one IFFT IP, approximately PP5 DSP slices for FIR, BRAM for buffering, and negligible LUT/DSP overhead for DDS. Power draw is moderate (~5 W per chain), and latency is dominated by the prototype group delay, with practical values of PP6s for a PP7-tap filter at PP8 MHz (Ruixuan et al., 1 Feb 2025).

On the MWA, the OC-PSB reconstructs microsecond-resolution time streams by inverting the analysis filter with an overlap-add structure. Complexity estimates indicate that for PP9 channels and hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-10 synthesis filter taps, a block of hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-11 output samples requires hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-12 real operations per output sample, compatible with real-time GPU or FPGA execution (McSweeney et al., 2020).

4. Performance Benchmarks and Error Sources

Measured performance metrics in both astronomical and laboratory contexts demonstrate critical capabilities:

  • Channel isolation: Simulations with Blackman–Harris windows show hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-13 dB stopband attenuation and in-band ripple hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-14 dB for OC-PSB (Ruixuan et al., 1 Feb 2025).
  • Signal-to-noise ratio: Spectrum-analyzer measurements for a single synthesized tone confirm SNR of hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-15 dB at hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-16 MHz offset and spurious-free dynamic range (SFDR) exceeding hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-17 dB, consistent with 16-bit DAC limits. No discrete spurious responses are observed above hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-18 dBc (Ruixuan et al., 1 Feb 2025).
  • Frequency accuracy: Measured tone spacing error is hp[]=h[P+p],=0,,L1,p=0,,P1h_p[\ell] = h[\ell P + p], \quad \ell = 0, \ldots, L-1, \quad p = 0, \ldots, P-19 Hz, with the minimum practical step size set by the phase accumulator LSB (e.g., L=Nh/PL = N_h/P0 Hz).
  • Reconstruction S/N loss: In the MWA, back-to-back analysis and synthesis with quantized filter coefficients yields an S/N loss not exceeding L=Nh/PL = N_h/P1 dB; filter-only losses are L=Nh/PL = N_h/P2 dB, while quantization contributes L=Nh/PL = N_h/P3 dB (McSweeney et al., 2020).
  • Fidelity: On the MWA, verified high time resolution (down to L=Nh/PL = N_h/P4s) enables detection of pulsar microstructure undetectable with conventional L=Nh/PL = N_h/P5s modes. No measurable polarization leakage is seen at L=Nh/PL = N_h/P6s scales (McSweeney et al., 2020).

5. Use Cases in Modern Astronomical Instrumentation

OC-PSB underpins several contemporary signal generation and channelization tasks:

  • Astrophysical signal synthesis: In MKID readout (Prime-Cam), OC-PSB enables large-scale, real-time signal biasing across thousands of detector channels, supplanting traditional LUT-based waveform generation and removing the associated bandwidth bottleneck.
  • High time resolution studies: In the MWA, the OC-PSB enables synthesis of high-fidelity microsecond time series from pre-channelized data, supporting precision pulsar timing, microstructure studies, and broadband transient detection (McSweeney et al., 2020, Ruixuan et al., 1 Feb 2025).
  • Bandwidth scalability: By deploying multiple parallel OC-PSB chains, aggregate output bandwidths up to L=Nh/PL = N_h/P7 GHz are achieved with channel spacings of L=Nh/PL = N_h/P8 kHz, showing a straightforward scaling path for next-generation multi-GHz detector systems (Ruixuan et al., 1 Feb 2025).

A plausible implication is that OC-PSB will become foundational for future broadband, scalable sensor architectures seeking sub-μs temporal resolution or kHz–MHz channel grid flexibility.

6. Practical Considerations and Trade-Offs

Performance and resource considerations include:

  • Latency: Set by the group delay of the prototype filter, typically L=Nh/PL = N_h/P9; practical values (e.g., PP0s) allow for real-time operation with minimal latency penalties (Ruixuan et al., 1 Feb 2025).
  • Computational load: Overlap–add in the synthesis stage requires PP1 operations per block, where PP2 is the DFT size and PP3 is the number of polyphase branches.
  • Rounding and quantization: To avoid DC bias and minimize S/N degradation, symmetric rounding should be used at all fixed-point filter stages (McSweeney et al., 2020).
  • Scalability: To double tone count or output bandwidth, increase IFFT size and the number of subfilters, or instantiate parallel processing chains. Adjustment of prototype filter length allows trade-offs between transition bandwidth and resource usage (Ruixuan et al., 1 Feb 2025).
  • Limitations: Currently, per-OC-PSB channel, only a single tone is placed; multiple tones per channel would require per-channel secondary IFFTs or explicit time-domain combination—an area for continued algorithmic improvement (Ruixuan et al., 1 Feb 2025).

7. Design Guidelines and Adaptability

System-specific choices for OC-PSB deployment:

  • Adjust PP4 to set channel number and desired PP5.
  • Select prototype filter window and length PP6 to achieve target stopband attenuation and transition width.
  • Optimize word-lengths and rounding schemes to fit S/N and compute budgets.
  • For applications tolerant of larger perfect-reconstruction error, shorter synthesis filters may suffice.
  • For S/N loss PP7 dB, synthesis filter length should be PP8 or PP9 (McSweeney et al., 2020).
  • The OC-PSB structure is agnostic to the underlying hardware and may be ported between FPGA, GPU, or ASIC environments. The overlap–add implementation and block-diagram recipe suffice for re-implementation or adaptation in other high-channel-count multi-rate signal processing systems (McSweeney et al., 2020, Ruixuan et al., 1 Feb 2025).

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