Ising Circuits for Computation

• Ising circuits are computational architectures that encode problems into binary spin configurations using an Ising energy function defined by pairwise interactions.
• They are realized in diverse hardware including spin Hall nano-oscillators, Kerr parametric oscillators, optical coherent devices, and memristive networks.
• By engineering energy descent, these circuits enable optimization, simulation, and logical synthesis where the ground state represents the desired computational output.

Ising circuits are circuit-based constructions in which computation, optimization, or simulation is organized around an Ising energy function or a closely related extension. In the simplest form, binary variables $s_i \in \{\pm 1\}$ are coupled through linear fields and pairwise interactions, and desired outputs are encoded as low-energy or ground-state configurations. In the literature, the term covers several related objects: analog Ising machines built from oscillators, photonic networks, memristive devices, or ancilla-spin couplers; logic circuits whose truth tables are compiled into Ising Hamiltonians; and quantum circuits whose amplitudes, transfer matrices, or variational ansätze are mapped to Ising partition functions or Ising-model dynamics (McGoldrick et al., 2021, Tsukiyama et al., 2024, Fujii et al., 2013).

1. Formal structure and state encodings

The canonical pairwise Ising Hamiltonian used across these constructions is

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$

At low temperature, computation is obtained by fixing an input subset and minimizing over the remaining spins, so that the output is the conditional ground state. In the geometric formulation of low-temperature Ising machines, a circuit of shape $(n,m)$ is a function $f:\Sigma^n \to \Sigma^m$ with $\Sigma=\{-1,+1\}$, and an Ising Hamiltonian $H(x,y)$ encodes the circuit when $f_H(x)=\arg\min_y H(x,y)$ agrees with $f(x)$ for every input $x$ (Moore et al., 16 Jul 2025).

Different hardware families realize the same binary abstraction through distinct physical observables. In electrically coupled spin Hall nano-oscillators, the phases are binarized by a global second-harmonic term so that $\phi_i\in\{0,\pi\}$ and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$0; the oscillator-network energy

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$1

reduces to the Ising Hamiltonian under phase binarization (McGoldrick et al., 2021). In Kerr parametric oscillator circuits, sufficiently strong two-photon pumping stabilizes opposite-phase coherent states $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$2 and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$3, with the Ising variable identified by the sign of the coherent amplitude; in the cat-state manifold, local coherent drives act as effective fields, and carefully selected pump frequencies generate four-body parity terms required by the Lechner–Hauke–Zoller embedding (Kawakami et al., 29 Nov 2025). In memristive circuits, the two resistive states $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$4 and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$5 serve as binary states, and the measured steady-state probabilities of circuit configurations are fitted exactly to a Boltzmann law to reconstruct $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$6, $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$7, and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$8 (Dowling et al., 2022).

At the logic-design end of the spectrum, “unit Ising models” restrict all nonzero $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$9 and $(n,m)$0 to $(n,m)$1, which is advantageous on limited-resolution annealing hardware. There the central design problem is inverse synthesis: choose local fields, couplers, and possibly ancillas so that every satisfying truth-table row is a ground state and every nonsatisfying row is separated by at least one unit of energy (Tsukiyama et al., 2024).

2. Analog and hardware realizations

A major class of Ising circuits consists of analog machines whose native dynamics perform energy descent. Spin Hall nano-oscillator networks exemplify this approach at microwave frequencies. Their phase dynamics follow a generalized Adler–Kuramoto equation,

$(n,m)$2

with programmable $(n,m)$3 implemented electrically through buffered and amplified MTJ outputs combined via programmable resistors $(n,m)$4. Circuit-level simulations were reported for arrays of $(n,m)$5–$(n,m)$6 SHNOs; for a size-$(n,m)$7 benchmark the reported operating point was $(n,m)$8 GHz, $(n,m)$9 ns solution time, $f:\Sigma^n \to \Sigma^m$0 mW active power excluding off-chip amplifiers, and $f:\Sigma^n \to \Sigma^m$1 nJ per solution, while on an unweighted Möbius ladder graph the ground-state probability at $f:\Sigma^n \to \Sigma^m$2 nodes was $f:\Sigma^n \to \Sigma^m$3 and solutions within $f:\Sigma^n \to \Sigma^m$4 of ground-state energy occurred with $f:\Sigma^n \to \Sigma^m$5 probability (McGoldrick et al., 2021).

Superconducting Kerr parametric oscillator circuits realize a different regime. Here the emphasis is not only on pairwise couplings but on local four-body constraints. A four-KPO circuit with only linear capacitive couplers was shown to generate the effective quartic term

$f:\Sigma^n \to \Sigma^m$6

which becomes an Ising interaction $f:\Sigma^n \to \Sigma^m$7 in the stabilized cat manifold. Experimentally, parity oscillations were controlled by the pump-phase combination $f:\Sigma^n \to \Sigma^m$8: the total probability of even-parity states was $f:\Sigma^n \to \Sigma^m$9 at $\Sigma=\{-1,+1\}$0, approximately unbiased at $\Sigma=\{-1,+1\}$1, and odd parity was favored at $\Sigma=\{-1,+1\}$2. A rough estimate gave $\Sigma=\{-1,+1\}$3 MHz, while a fit to measured state populations gave $\Sigma=\{-1,+1\}$4 MHz (Kawakami et al., 29 Nov 2025).

Optical coherent Ising machines implement spins in the binary phase of degenerate optical parametric oscillators. A $\Sigma=\{-1,+1\}$5-bit time-division-multiplexed femtosecond-DOPO machine experimentally achieved more than $\Sigma=\{-1,+1\}$6 success rates on one-dimensional Ising ring and cubic-graph instances, and both simulations and experiment indicated that gradual pumping and multimode dynamics improve performance. In the supplemental simulations, abrupt pumping at $\Sigma=\{-1,+1\}$7 yielded only $\Sigma=\{-1,+1\}$8 and $\Sigma=\{-1,+1\}$9 final success on ferromagnetic and antiferromagnetic ring instances, whereas gradual pumping from $H(x,y)$0 to $H(x,y)$1 over $H(x,y)$2 round trips reached $H(x,y)$3 success, consistent with the reported multimode-tunneling picture (Takata et al., 2016). Later optical designs added explicit error-correction loops. In these CIM-CAC, CIM-CFC, and CIM-SFC systems, auxiliary amplitudes $H(x,y)$4 correct amplitude heterogeneity and can induce chaotic search dynamics under directional couplings $H(x,y)$5. On Sherrington–Kirkpatrick instances with $H(x,y)$6, the median time-to-solution was reported to be $H(x,y)$7 matrix–vector multiplies for CIM-CFC, CIM-SFC, and dSBM, and the proposed thin-film $H(x,y)$8 optical hardware operated at $H(x,y)$9 GHz in the energy estimates (Reifenstein et al., 2021).

Memristive Ising circuits realize Ising statistics in periodically driven networks of stochastic binary resistors with memory. A distinctive feature is the simultaneous presence of effective ferromagnetic and antiferromagnetic tendencies within a single drive cycle: positive pulses promote alternating states, whereas negative pulses promote uniform states. The steady-state configuration probabilities can be converted into effective energies $f_H(x)=\arg\min_y H(x,y)$0, from which $f_H(x)=\arg\min_y H(x,y)$1, $f_H(x)=\arg\min_y H(x,y)$2, and $f_H(x)=\arg\min_y H(x,y)$3 are recovered in closed form. In the $f_H(x)=\arg\min_y H(x,y)$4 antiferromagnetic example, the reconstructed values were $f_H(x)=\arg\min_y H(x,y)$5, $f_H(x)=\arg\min_y H(x,y)$6, $f_H(x)=\arg\min_y H(x,y)$7 for $f_H(x)=\arg\min_y H(x,y)$8, and $f_H(x)=\arg\min_y H(x,y)$9, $f(x)$0, $f(x)$1 for $f(x)$2 (Dowling et al., 2022).

Programmable quantum annealing with Ising quantum wires occupies another important hardware niche. There, distant logical spins are connected by ancillary ferromagnetic chains embedded on a 3D cubic lattice, so arbitrary all-to-all logical couplings are synthesized from strictly local interactions. For a two-terminal wire in the low-temperature ferromagnetic regime, the effective logical interaction is

$f(x)$3

and the thermal error probability of a wire of length $f(x)$4 is given exactly by the transfer-matrix formula quoted in the paper. The architecture was illustrated on Max-Cut and on factorization of $f(x)$5, with the latter compiled into a $f(x)$6-qubit local architecture (Qiu et al., 2020).

3. Logic synthesis, arithmetic, and compilation

At the logic level, Ising circuits encode Boolean relations directly in ground states. Unit-coefficient synthesis makes this explicit. In that framework the NOT gate is represented by

$f(x)$7

while more complex gates require ancillas if all nonzero coefficients are constrained to $f(x)$8. The zero-input unit AND and XOR constructions given in the literature use ancilla-assisted Hamiltonians with ground-state energies $f(x)$9 and $x$0, respectively, and half-adder and full-adder blocks are then composed into multipliers. The resulting multiplier circuits support both forward computation and inverse computation, so that fixing the product bits turns the same Ising circuit into a factorization machine. This motivates the notion of an application-specific unit quantum annealer, or ASUQA, as a fixed Ising implementation of a chosen inverse problem (Tsukiyama et al., 2024).

A complementary line of work minimizes the number of auxiliary spins needed to realize a circuit. The reverse-Ising problem is formulated there as a mixed-integer search over auxiliary functions together with a linear feasibility problem for Hamiltonian coefficients. By introducing augmented constraints and neutralizable auxiliaries, the dependence on the number of auxiliary spins is reduced from exponential to quadratic at the level of the linear problem. Concrete benchmark results include $x$1 multiplication with $x$2 auxiliaries and $x$3 total spins, and $x$4 multiplication with $x$5 auxiliaries and $x$6 total spins, compared with earlier $x$7- and $x$8-spin constructions (Martin et al., 2023).

Ising formulations also appear in quantum-circuit compilation. ISAAQ casts qubit routing on NISQ devices as a QUBO over layerwise placement variables $x$9, with objective terms for gate-building costs and movement costs and quadratic penalties enforcing bijections. The remote-CNOT cost model is

$\phi_i\in\{0,\pi\}$0

and multiple Ising machines can solve chunked routing problems in parallel with binary scheduling, for which the runtime bound is $\phi_i\in\{0,\pi\}$1. On the reported $\phi_i\in\{0,\pi\}$2-qubit benchmark, relay-qubit caching reduced additional physical CNOTs by $\phi_i\in\{0,\pi\}$3, $\phi_i\in\{0,\pi\}$4, and $\phi_i\in\{0,\pi\}$5 on Linear, QX5, and QX20 devices, respectively, and across $\phi_i\in\{0,\pi\}$6 benchmark circuits ISAAQ outperformed SABRE, tket, and the prior QUBO method in average compilation cost (Naito et al., 2023).

4. Quantum-circuit correspondences and computational complexity

A different sense of “Ising circuit” arises when quantum-circuit amplitudes are written exactly as Ising partition functions. For IQP circuits, the output probabilities satisfy

$\phi_i\in\{0,\pi\}$7

where $\phi_i\in\{0,\pi\}$8 is an Ising partition function with imaginary multi-body couplings and outcome-dependent $\phi_i\in\{0,\pi\}$9 fields. This correspondence is productive in both directions: planar two-qubit IQP without single-qubit rotations is classically simulable almost in the strong sense through Pfaffian methods, while multiplicative approximation of such imaginary-coupling partition functions is $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$00-hard for almost all angles and admits no FPRAS unless the polynomial hierarchy collapses (Fujii et al., 2013).

Low-depth quantum-circuit schemes can also be used to measure Ising partition functions directly. In one construction, the overlap amplitude of a constant-depth circuit of global operations is proportional to $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$01, a complex-temperature Ising partition function, and analytic continuation then yields estimates of $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$02. The same framework was used to derive explicit Berry–Esseen–type confidence bounds for the reconstructed amplitude, to connect partition-function estimation to Jones-polynomial evaluation, to prove BQP-hardness for sufficiently precise estimates of real-temperature ferromagnetic Ising partition functions on square lattices, and to show that accurate corner-magnetization measurements imply an FPRAS for the partition function (Iblisdir et al., 2012).

Generalized Ising machines extend this correspondence to arbitrary gate-model quantum computation. There, a time-unrolled network of probabilistic $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$03-bits represents Feynman paths, and each gate matrix element $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$04 is rewritten as a complex energy $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$05. The total amplitude becomes a sum over paths $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$06,

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$07

so interference is recovered by sampling with respect to $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$08 and accumulating phases from $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$09. The formalism is exact for arbitrary circuits, although purely imaginary energies reproduce the usual sign problem and exponential variance growth (Chowdhury et al., 2020).

5. Quantum simulation, Ising dynamics, and Ising-type gates

Ising circuits are also literal quantum circuits for simulating Ising systems. For the one-dimensional transverse Ising chain, an exact diagonalization circuit is built from Jordan–Wigner, Fourier, and Bogoliubov transforms,

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$10

so that preparing computational-basis states and applying the inverse transform yields exact eigenstates of the model. The $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$11 construction was implemented on IBM and Rigetti hardware, and the asymptotic resources reported for the general algorithm were $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$12 gates and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$13 depth (Cervera-Lierta, 2018).

For variational simulation of critical Ising systems, deep multi-scale entanglement renormalization circuits provide a different circuit notion. In the critical transverse-field Ising model, DMERA with real matchgates was simulated exactly to hundreds of qubits. The reported infinite-volume energy-density error was below $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$14 at depth $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$15, with exponential improvement versus $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$16 and slope $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$17; moreover, translational and Kramers–Wannier symmetry averaging reduced correlator errors by up to four orders of magnitude, with relative error below $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$18 at $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$19 (Sewell et al., 2022).

Analog superconducting circuits provide a field-theoretic extension. Arrays of Josephson elements with multi-harmonic on-site potentials implement $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$20-fold sine-Gordon models whose infrared limits realize the unitary minimal series, with

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$21

In that construction, $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$22 yields the Ising universality class and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$23 the tricritical Ising class; DMRG on the proposed lattice circuits extracted central charges close to $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$24 and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$25, respectively, through entanglement-entropy and Casimir scaling (Roy, 2023).

At the gate-synthesis level, Ising-type interaction itself is the primitive. Composite two-qubit circuits based on $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$26 were shown to admit a minimal robust entangler with $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$27 elementary Ising evolutions, sufficient for a robust CZ or CNOT under coupling-strength error, while a robust SWAP-equivalent construction requires $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$28. All $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$29 robust circuits map exactly onto one-qubit composite pulses robust to pulse-length error, specifically the SCROFULOUS family (Ichikawa et al., 2012).

Other quantum-circuit uses preserve the Ising label but change the physical interpretation. A braiding-like exchange of two Ising chains was implemented by Suzuki–Trotterized adiabatic evolution on a digital quantum computer; ideal simulations reached fidelity $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$30 for systems of up to $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$31 sites per chain, but achieving fidelity above $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$32 at depth of order $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$33 would require gate errors below $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$34, beyond current NISQ hardware (Elfeky et al., 2021). In loop quantum gravity, “Ising spin networks” on 4-valent graphs are encoded as quantum circuits on intertwiner qubits; the improved $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$35 projection method reduces resource use from $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$36 qubits to $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$37 for 4-valent $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$38-node graphs, and a $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$39-node network was compressed from $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$40 to $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$41 qubits (Czelusta et al., 2023).

6. Geometric design principles, scaling laws, and open issues

A unifying design question across Ising circuits is how to shape the energy landscape so that the desired output is not merely a global minimum but the only relevant attractor. The geometric theory makes this explicit by introducing residual Hamiltonians

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$42

and minimizing cells

$$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$43

which partition residual-input space into convex polyhedra. In that language, an Ising circuit is obtained by choosing $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$44 and an affine map $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$45 such that $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$46 for every input $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$47. The same framework proves that these circuits generalize 1-NN classifiers whose prototypes are the vertices of a parallelepiped $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$48, and that elimination of spurious local minima is itself a linear-programming problem (Moore et al., 16 Jul 2025).

Scaling bottlenecks remain hardware-specific. SHNO networks provide GHz dynamics and compact footprints, but naive all-to-all programmability scales as $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$49, and the paper explicitly identifies routing density, delay compensation, and calibration of $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$50 and $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$51 as major design constraints (McGoldrick et al., 2021). KPO realizations simplify four-body couplers by using only linear capacitors, but require careful pump-frequency planning to enforce only the desired resonance conditions and to suppress residual interactions; for larger lattices, the paper notes that nine distinct pump frequencies can tile the array without unwanted quartic resonances (Kawakami et al., 29 Nov 2025). Minimal-auxiliary logical designs sharply reduce spin count, but they do not optimize dynamic range, energy gap, or connectivity, so embedding overhead and analog precision can still dominate on physical annealers (Martin et al., 2023).

A broad pattern emerges from these results. Physical Ising circuits succeed when the binary encoding, the coupling fabric, and the error mechanism are co-designed: global $$H = -\sum_{i<j} J_{ij} s_i s_j - \sum_i h_i s_i, \qquad s_i \in \{+1,-1\}.$$52 injection for oscillator binarization, pump-phase engineering for four-body KPO constraints, gradual pumping and multimode dynamics in optical OPOs, or exact LP margins in logical encodings. This suggests that “Ising circuit” is best understood not as a single device class but as a common design paradigm: arrange hardware or gate structure so that an Ising-type energy landscape becomes the operative computational object.