Integrated Feed-Forward Photonic Neural Network

• Integrated feed-forward photonic neural networks are defined by using photonic integrated circuits for unidirectional, high-speed linear transformations.
• They utilize physical computation primitives like MZI meshes, microring resonators, and delay lines to implement both linear operations and nonlinear activations.
• Recent advances focus on hardware–algorithm co-design, with innovations in device-based training, low-power nonvolatile weights, and structural memory through explicit delays.

Searching arXiv for recent and relevant papers on integrated feed-forward photonic neural networks. Integrated feed-forward photonic neural networks (PNNs) are neural-network implementations in which signals propagate unidirectionally through integrated photonic hardware, from input layer to hidden and output layers, while the dominant linear operations are executed by optical propagation, interference, attenuation, or wavelength-selective weighting. In this class of systems, the layerwise computation follows the standard feed-forward form $\mathbf{y}=f(\mathbf{W}\mathbf{x}+\mathbf{b})$, but the matrix-vector multiplication and, in some cases, the nonlinearity and even learning dynamics are mapped onto physical photonic devices such as Mach–Zehnder interferometers (MZIs), microring resonators (MRRs), delay lines, phase-change material (PCM) synapses, balanced photodetectors, and electro-optic modulators (Tsakyridis et al., 2023). The literature presents integrated feed-forward PNNs as a hardware–algorithm co-design domain rather than a single architecture: coherent MZI meshes, wavelength-division-multiplexed weight banks, time-delayed complex perceptrons, convolutional photonic front ends, photonic extreme learning machines, and deep PCM-crossbar networks all instantiate the same feed-forward principle under different physical constraints (Brunner et al., 14 Jan 2025).

1. Definition and architectural scope

An integrated feed-forward PNN is distinguished by two coupled properties: photonic integration and feed-forward signal flow. Integration places the computational substrate on a photonic integrated circuit, typically silicon photonics, silicon nitride, thin-film lithium niobate (TFLN), or related hybrid platforms. Feed-forward operation means that information propagates strictly from input to output without recurrent global loops in the inference path. A recent review states that a feed-forward neural network propagates information strictly from input to output and “possess[es] no intrinsic memory mechanism to retain information from prior time steps,” so any memory in such systems is structural rather than dynamical (Foradori et al., 24 Apr 2026).

Within this broad definition, integrated feed-forward PNNs are most naturally interpreted as hardware realizations of the linear–nonlinear decomposition of deep networks. The linear transformation $\mathbf{W}\mathbf{x}$ is the primary target for photonic acceleration because optical hardware can perform interference-based or power-summing matrix-vector multiplication in parallel and at high bandwidth (Tsakyridis et al., 2023). The nonlinearity may be imposed electronically after photodetection, implemented electro-optically, or realized all-optically by exploiting device physics such as gain saturation, reverse saturable absorption, induced transparency, or MRR nonlinear response (Miscuglio et al., 2018).

The taxonomy developed in recent surveys places feed-forward PNNs alongside recurrent systems, reservoir computing, spiking photonics, and hybrid optoelectronic systems, but emphasizes that feed-forward designs occupy the most “stateless” end of the spectrum (Foradori et al., 24 Apr 2026). This matters because it clarifies both their strengths and their limitations: they are well suited to fast, single-pass inference and finite-window signal processing, but they do not natively provide the long-lived internal state that recurrent or reservoir architectures exploit.

2. Physical computation primitives

The linear stage of integrated feed-forward PNNs is implemented through a small number of recurring physical motifs. Coherent architectures use field interference to realize signed matrix elements; incoherent architectures use optical power addition, often in wavelength-division multiplexing (WDM) systems; and delay-based architectures convert time into space by presenting a finite history of the input to a weighted optical combiner (Tsakyridis et al., 2023).

A representative coherent realization is the programmable MZI mesh. In TFLN, the ZEN-1 device implements a programmable $4\times 4$ triangle MZI mesh with 54 individually tunable electro-optic phase shifters and uses coherent interference to perform unitary matrix computation (Zheng et al., 2024). The core operation is $\mathbf{y}=U\mathbf{x}$, where $U$ is a programmable SU(4) matrix, and any $4\times 4$ matrix multiplication can be realized by embedding an SU(4) transformation in a $6\times 6$ triangle network of MZIs (Zheng et al., 2024). The device reports an average fidelity of $0.985 \pm 0.003$, a computation speed of 0.64 TOPS, and an energy efficiency of 33.5 fJ/OP (Zheng et al., 2024).

MRR-based systems constitute a second major primitive. Reviews of silicon microresonator PNNs describe add-drop and all-pass MRRs as compact weighted-sum and activation elements with resonance-dependent transfer functions, linewidth, quality factor, and photon lifetime that can be engineered for weighting, filtering, and nonlinear response (Biasi et al., 2023). In broadcast-and-weight networks, a bank of MRRs assigns wavelength-dependent weights, while balanced photodetection enables signed accumulation (Biasi et al., 2023). Because resonance depends on wavelength, temperature, carrier density, and coupling strength, MRRs are powerful but also highly sensitive to drift and crosstalk.

Delay-line perceptrons implement a third canonical primitive. In a four-tap fully passive silicon-photonic complex perceptron, delayed versions of the input are generated by spiral waveguides with $\Delta_t=50\ \text{ps}$ and combined as

$y(t)=\left|\sum_{k=1}^{N} u_k(t) w_k\right|^2,$

with $\mathbf{W}\mathbf{x}$0 in the demonstrated device (Mancinelli et al., 2021). The delayed copies form a local temporal feature vector, and trainable phases tune the interference pattern seen by the square-law detector. This realizes a feed-forward temporal classifier with short-term memory supplied only by the explicit delays rather than by recurrence.

The same logic extends to communication equalizers. An eight-tap silicon-on-insulator photonic neural network performs

$\mathbf{W}\mathbf{x}$1

with $\mathbf{W}\mathbf{x}$2 and $\mathbf{W}\mathbf{x}$3, followed by square-modulus detection at the photodiode (Staffoli et al., 18 Jul 2025). Here the optical FIR filter is the linear stage, and the photodetector supplies the nonlinear stage.

3. Representative feed-forward architectures

Several architecture families have emerged, each emphasizing a different tradeoff among footprint, programmability, precision, and temporal context.

The first family is the multilayer perceptron or linear-layer accelerator. The WDIPLN architecture, a Wavelength Diverse Integrated Photonic Linear Neuron, implements the linear part of a fully connected layer on a foundry-fabricated silicon photonic chip. It replaces large Mach–Zehnder modulators with compact micro-resonant devices, supports coherent summation within each wavelength channel, and wavelength-parallel operation across isolated channels (Niekerk et al., 2022). The architecture experimentally demonstrates addition and subtraction and predicts AND, OR, and XOR with accuracies of 96.8%, 99%, and 98.5%, respectively (Niekerk et al., 2022). Its significance lies in showing how a feed-forward MAC block can be miniaturized while retaining signed arithmetic through phase inversion.

The second family is the time-delayed complex perceptron. The fully passive silicon photonic perceptron described above recognizes 2-bit and 3-bit patterns in PRBS-NRZ streams and performs delayed XOR operations up to 16 Gbps, limited by the testing electronics (Mancinelli et al., 2021). The device reports BER down to about $\mathbf{W}\mathbf{x}$4 at 5 Gbps, $\mathbf{W}\mathbf{x}$5 at 8 Gbps, $\mathbf{W}\mathbf{x}$6 at 10 Gbps, and $\mathbf{W}\mathbf{x}$7 at 16 Gbps, with zero-error decoding of phase-encoded information at 10 Gbps (Mancinelli et al., 2021). It is feed-forward because the delay lines only create a finite temporal embedding and do not introduce recurrent state.

The third family is the convolution-first photonic front end. Monolithically integrated optical convolutional processors on TFLN implement trainable convolution kernels using data encoding, optical true delay lines, and programmable 1×2 MZIs (Liu et al., 28 Jul 2025). The processor realizes a feed-forward pipeline

$\mathbf{W}\mathbf{x}$8

and is designed to reduce the dimensionality of the subsequent fully connected layer, which is otherwise difficult to scale photonicly (Liu et al., 28 Jul 2025). Experimentally, the devices achieve 96% on MNIST, 86% on Fashion-MNIST, and 84.6% on AG News, while reducing the required FC dimensions to 196×10 from 784×10 and 175×4 from 800×4 (Liu et al., 28 Jul 2025).

The fourth family is the photonic extreme learning machine. An integrated array of 18 microresonators acts as a fixed random hidden layer, while a video camera measures intensity and a digital ridge-regression readout trains only the output weights (Biasi et al., 2023). In standard ELM form, $\mathbf{W}\mathbf{x}$9, with $4\times 4$0 or a ridge-regression variant (Biasi et al., 2023). This is a feed-forward PNN because light propagates one way through a single hidden layer, even though the optical hidden weights are not trained.

A fifth family extends the notion of feed-forward photonic networks into optical communications equalization. Experimental dispersion compensation for 20 Gbps PAM4 over 125 km and nonlinear distortion equalization for 10 Gbps PAM2 over 200 km CD-dominated or 450 km SPM-dominated links both use integrated feed-forward PNNs with time-delayed complex perceptron structure and square-law photodetection (Staffoli et al., 2024, Staffoli et al., 18 Jul 2025). These systems are notable because they show that the feed-forward formalism is not restricted to image-classification benchmarks.

4. Materials platforms and device technologies

Integrated feed-forward PNNs are strongly shaped by their material platforms. Silicon photonics remains the dominant substrate for dense integration, compact MRRs, phase shifters, and CMOS-compatible fabrication (Biasi et al., 2023). Silicon-on-insulator devices support MZI meshes, delay lines, MRR weight banks, PIN attenuators, and carrier-based or thermo-optic tuning, but they also inherit thermal sensitivity, loss accumulation, and fabrication variability (Xu et al., 2024).

TFLN has become a prominent alternative where low optical loss and electro-optic tuning are decisive. The first electro-optically tunable PNN on TFLN shows how EO tuning avoids the continuous static power required by thermo-optic phase settings, with measured MZI half-wave voltage $4\times 4$1, extinction ratios of $4\times 4$2 and $4\times 4$3 for bar and cross routes, rise/fall time of 180 ps, and bandwidth greater than 20 GHz (Zheng et al., 2024). Convolutional processors on TFLN further exploit low propagation loss, reported as $4\times 4$4, and low-voltage modulation with measured $4\times 4$5 for CMOS-compatible or FPGA-driven operation (Liu et al., 28 Jul 2025).

PCM-based photonic devices supply non-volatile weights and, in more advanced systems, local plasticity. In a deep photonic neuromorphic network, GST PCM synapses arranged in optical crossbars implement feed-forward vector-matrix multiplication, while a local optical feedback path realizes Hebbian updates (Li et al., 29 Jan 2026). The architecture is feed-forward in inference because layer outputs drive the next layer directly, even though learning introduces a local column-wise feedback path outside the inference flow. This suggests that the boundary between feed-forward inference and locally recurrent learning circuitry is architectural rather than taxonomic.

Hybrid integration is increasingly presented as the long-term route to scaling. Roadmap literature argues for combining InP sources and gain, SiN low-loss routing and combs, SOI dense computation, and TFLN fast modulation, because no single material simultaneously optimizes all requirements of large feed-forward photonic networks (Brunner et al., 14 Jan 2025). This suggests that the future “integrated” feed-forward PNN may often be a heterogeneous photonic system rather than a monolithic single-material chip.

5. Nonlinearity, readout, and memory

The principal misconception about feed-forward PNNs is that optics alone automatically supplies all neural-network ingredients. In practice, the linear stage is the most mature photonic component, whereas nonlinearity remains the major system-level bottleneck (Tsakyridis et al., 2023).

Many integrated feed-forward PNNs rely on photodetection as the nonlinear stage. In delay-line perceptrons and communication equalizers, the photodiode implements square-law detection, so the effective activation is the square modulus of the optical field (Mancinelli et al., 2021, Staffoli et al., 18 Jul 2025). This is sufficient for certain tasks, especially when the upstream optical transformation is rich and task-specific. A review of microresonator-based PNNs similarly notes that even nominally linear feed-forward optical processors often become nonlinear at readout because photodetectors measure intensity rather than complex field (Biasi et al., 2023).

Other systems implement nonlinearities digitally or electro-optically. ZEN-1 performs optical linear layers while using measured power as nonlinear activation in hybrid task pipelines (Zheng et al., 2024). Fully integrated on-chip backpropagation work in silicon uses PIN attenuator–based ReLU-like activation and gradient blocks, making both $4\times 4$6 and $4\times 4$7 accessible on the same photonic platform (Ashtiani et al., 17 Jun 2025).

All-optical activation remains an active research direction. Two modeled activation mechanisms—induced transparency in a plasmon–quantum-dot hybrid and reverse saturable absorption in C60:PVA—provide about 3 dB and 7 dB extinction ratio, respectively, and yield MNIST accuracies of 97% and near 100% in emulation, though with ignored noise in the network (Miscuglio et al., 2018). The key significance is conceptual: these proposals address the missing activation block required for a fully optical feed-forward perceptron.

Memory in feed-forward PNNs is primarily structural. Reviews emphasize that such networks “possess[es] no intrinsic memory mechanism to retain information from prior time steps,” and that any temporal context comes from fixed delays, finite photon lifetime, or stored weights rather than from autonomous state evolution (Foradori et al., 24 Apr 2026). Delay-line perceptrons are therefore best interpreted as time-delay neural networks or optical FIR filters rather than recurrent photonic networks.

6. Training paradigms and hardware awareness

Training has become one of the central differentiators among integrated feed-forward PNNs. Early or conventional photonic systems typically train weights digitally and then map them onto optical hardware. More recent work increasingly incorporates device physics into the optimization procedure itself.

A tutorial on PNNs frames this under “optics-informed deep learning,” in which training includes fabrication variations, limited bandwidth, finite extinction ratio, quantization, nonlinear device response, and drift (Tsakyridis et al., 2023). This framework is especially relevant to feed-forward photonic accelerators because analog hardware precision is limited and transfer functions are often only approximately known.

A particularly explicit example is hardware-aware training and pruning for integrated photonic neural networks. The method trains weights toward noise-robust and low-power regions of the physical transfer function, rather than only minimizing a task loss (Xu et al., 2024). The general objective is

$4\times 4$8

where $4\times 4$9 is a physical nuisance parameter. For MRRs, the objective specializes to

$\mathbf{y}=U\mathbf{x}$0

pushing many weights toward the variance-insensitive, low-tuning-power region near weight 1 (Xu et al., 2024). For broader spectral or PCM settings, the regularizer is written in derivative form with respect to wavelength or temperature:

$\mathbf{y}=U\mathbf{x}$1

The method is validated on MRR-based and PCM-based PNNs and improves experimental handwritten-digit accuracy from 67.0% to 95.0% without a thermoelectric controller, while reducing energy by tenfold and improving weight precision by 4 bits (Xu et al., 2024).

A second line of work addresses the case where the internal photonic transformation is only partially known. Asymmetrical training treats an encapsulated deep photonic neural network as a grey box and updates the physical system using a mixture of a differentiable parallel model and a pseudo-direction inferred from the physical output error (Wang et al., 2024). The key estimator is

$\mathbf{y}=U\mathbf{x}$2

with typical values $\mathbf{y}=U\mathbf{x}$3 (Wang et al., 2024). This avoids hidden-layer readout and preserves analogue end-to-end propagation. On a 4×4 SiN chip, asymmetrical training improves Iris classification from 38% with direct BP and 78% with calibrate-and-transfer BP to 97%, matching the theoretical maximum for the structure (Wang et al., 2024).

A third line brings backpropagation directly on chip. An integrated photonic deep neural network with end-to-end on-chip gradient-descent BP implements forward pass, backward error propagation, nonlinear activation gradients, and weight updates on a single silicon photonic platform (Ashtiani et al., 17 Jun 2025). The forward relation is

$\mathbf{y}=U\mathbf{x}$4

and the backpropagation rules follow the standard forms

$\mathbf{y}=U\mathbf{x}$5

with mean squared error loss and a fixed learning rate $\mathbf{y}=U\mathbf{x}$6 (Ashtiani et al., 17 Jun 2025). The reported 92.5% inference accuracy on a 2D point-separation task is important less for the absolute number than for the demonstration that hardware-native backpropagation can match ideal digital performance under fabrication variation (Ashtiani et al., 17 Jun 2025).

Not all feed-forward photonic learning is supervised. A deep photonic neuromorphic network with PCM synapses demonstrates online unsupervised Hebbian learning through local optical feedback, using updates described as $\mathbf{y}=U\mathbf{x}$7 and experimentally attaining 100% recognition of six letters on a proof-of-concept fiber-optic platform (Li et al., 29 Jan 2026). This broadens the training landscape for feed-forward photonic networks beyond offline supervised mapping.

7. Performance, limitations, and open problems

The reported performance of integrated feed-forward PNNs spans diverse metrics and tasks, making direct comparison difficult. Some systems emphasize task accuracy, others matrix fidelity, BER, throughput, or power. Nonetheless, several patterns are consistent across the literature.

On task-level benchmarks, integrated photonic devices already demonstrate nontrivial classification and signal-processing performance. TFLN convolutional processors achieve 96% on MNIST, 86% on Fashion-MNIST, and 84.6% on AG News while reducing FC-layer dimensionality (Liu et al., 28 Jul 2025). The control-free hardware-aware MRR network lifts experimental MNIST digit accuracy from 67.0% to 95.0% and LeNet-5 with injected experimental error from 10.9% to 98.0% (Xu et al., 2024). The PCM-based deep photonic neuromorphic network reaches 100% recognition accuracy on its six-letter task (Li et al., 29 Jan 2026). Communication-oriented feed-forward PNNs equalize chromatic dispersion up to 125 km for 20 Gbps PAM4 and up to 200 km for 10 Gbps PAM2, while nonlinear equalization extends to 450 km for self-phase modulation in direct-detection links (Staffoli et al., 2024, Staffoli et al., 18 Jul 2025).

On physical metrics, TFLN platforms report low loss and favorable EO efficiency. ZEN-1 gives 0.64 TOPS and 33.5 fJ/OP (Zheng et al., 2024), while convolutional TFLN processors report computational error with standard deviation around 0.74%, corresponding to about 7-bit precision, and adjacent optical true delay-line delays of $\mathbf{y}=U\mathbf{x}$8 (Liu et al., 28 Jul 2025). In silicon delay-line perceptrons, operation up to 16 Gbps is demonstrated, though limited by electronics rather than the photonic device (Mancinelli et al., 2021).

However, several limitations recur. Thermal drift, resonance drift, and thermal crosstalk are especially severe in MRR-based feed-forward PNNs (Xu et al., 2024, Biasi et al., 2023). Analog precision is typically modest; the tutorial literature frames 4–8 bits as a practical operating region and explicitly relates higher precision to larger optical energy through shot-noise-limited scaling (Tsakyridis et al., 2023). Nonlinearity remains a bottleneck because many demonstrations still depend on photodetection or digital post-processing rather than compact, trainable, low-power optical activation (Miscuglio et al., 2018, Brunner et al., 14 Jan 2025). Training often requires hardware-aware models or in situ adaptation because standard backpropagation on idealized digital abstractions can fail badly under fabrication variation (Wang et al., 2024, Ashtiani et al., 17 Jun 2025).

Feature encoding is itself a nontrivial limitation in small integrated systems. When multiple input features are merged into a single photonic channel to save hardware, the encoding implicitly fixes relative feature importance and constrains what the network can learn (Queiroz et al., 2024). On Iris, choosing the right encoding yields up to a 12.3% accuracy improvement and can even outperform networks in which features are not combined (Queiroz et al., 2024). This suggests that architectural compactness and statistical representation are tightly coupled in feed-forward PNNs.

A common misconception is that the main obstacle to large-scale feed-forward photonic AI is only the linear optical core. The literature suggests otherwise. Linear photonic computation is comparatively mature; the harder system bottlenecks are stable and low-power weight programming, nonlinear activation, calibration-light training, packaging, detector and converter overhead, and the interaction between finite analog precision and task accuracy (Tsakyridis et al., 2023, Brunner et al., 14 Jan 2025). Another misconception is that feed-forward PNNs are intrinsically memoryless in every practical sense. Reviews clarify that while they lack intrinsic recurrent state, they may still exploit structural memory through delays, stored photonic weights, or other explicit temporal embeddings (Foradori et al., 24 Apr 2026).

Taken together, the field suggests a converging design philosophy. Integrated feed-forward PNNs are most effective when the optical hardware is used where it is strongest—high-bandwidth parallel linear transforms, delay embeddings, and wavelength multiplexing—while training, encoding, and device physics are treated as part of a single optimization problem rather than separate layers of abstraction. A plausible implication is that the next phase of progress will depend less on proposing new isolated photonic components than on integrating low-loss materials, hardware-native learning, non-volatile or low-power weighting, and compact nonlinear stages into stable, heterogeneous photonic systems (Brunner et al., 14 Jan 2025).