InAs Nanowires: Structure, Growth, and Applications
- InAs nanowires are quasi-one-dimensional semiconductor structures exhibiting polytypism and intrinsic surface electron accumulation that critically influence band structure and transport properties.
- Controlled growth modalities, including vapor-liquid-solid and catalyst-free selective-area methods, enable precise engineering of diameter, phase and defect landscapes.
- Their tailored electronic, optical and thermal behaviors underpin advanced applications in quantum devices, hybrid superconducting platforms and thermoelectric systems.
InAs nanowires are quasi-one-dimensional III–V semiconductor structures that combine a narrow band gap, high electron mobility, strong spin–orbit coupling, and pronounced surface electron accumulation, and they therefore occupy a central position in nanoelectronics, optoelectronics, mesoscopic transport, and hybrid superconductor platforms (Panda et al., 2011, Katzenmeyer et al., 2010, Pan et al., 2020). Across the literature they appear in vertical vapor–liquid–solid geometries, catalyst-free selective-area geometries, and in-plane selectively grown networks; common themes are wurtzite/zinc-blende polytypism, diameter-dependent electronic properties, strong interface sensitivity, and the possibility of engineering transport, optical response, and superconducting proximity by shell growth, lithographic confinement, and post-growth chemical modification (0903.4146, Giudice et al., 2020, Adhikari et al., 18 Feb 2025).
1. Crystal structure, polytypism, and surface electronic structure
Bulk InAs stabilizes in the cubic zincblende phase, but nanowires frequently stabilize the hexagonal wurtzite phase and can switch repeatedly between the two along the growth axis, producing polytypism with alternating zincblende and wurtzite segments, phase boundaries, and stacking faults (Panda et al., 2011). In Au-assisted vapor–liquid–solid InAs nanowires grown on GaAs(111)B, transmission electron microscopy and selective-area electron diffraction showed wires that were primarily wurtzite, with thin zincblende segments interspersed with wurtzite and a high density of stacking faults; a native amorphous oxide layer of about $2$ nm surrounded the nanowires (Katzenmeyer et al., 2010). Comparable wurtzite cores were also reported for InAs–InAlAs and InAs–AlInAs/InAlP core–shell structures, where low growth rates reduced stacking-fault density and produced nearly single-crystalline shells (Holloway et al., 2012, Haapamaki et al., 2011).
The coexistence of wurtzite and zincblende is not merely crystallographic. It modifies band structure, introduces interfacial strain, and changes electron and phonon scattering. Temperature-dependent Raman spectroscopy has been used as a non-invasive structural probe of this polytypism: for the unresolved TO mode near , the measured slopes were for bulk zincblende InAs, for a nanowire sample with wurtzite fraction, and for a sample with wurtzite fraction, yielding a Raman-derived relative wurtzite fraction , in excellent agreement with the TEM-derived ratio (Panda et al., 2011). In the same study, the LO linewidth at $120$ K broadened from about 0 in bulk to about 1 and 2 in the two mixed-phase nanowire samples, and the anomalous temperature evolution of that linewidth was attributed to interfacial strain relaxation rather than simple anharmonic broadening (Panda et al., 2011).
A defining electronic feature of InAs nanowires is intrinsic surface electron accumulation. The surface accumulation layer has a reported thickness 3 nm and an electron density on the order of 4; as the nanowire radius approaches that scale, the surface region can dominate the full cross-section (Katzenmeyer et al., 2010). This directly underlies diameter-dependent carrier density, gate response, contact behavior, and the frequent appearance of parasitic surface-defined quantum dots in poorly passivated devices. A plausible implication is that “intrinsic” InAs nanowires cannot be discussed independently of their surfaces: for many experimentally relevant diameters, surface electrostatics are part of the effective bulk.
2. Growth modalities and geometric control
InAs nanowires have been realized by several growth routes whose common objective is precise control of diameter, aspect ratio, crystal phase, and substrate compatibility. Au-assisted chemical beam epitaxy on engineered substrates demonstrated that a 5 nm InAs cap on GaAs/AlGaAs heterostructures and a 6-thick InAs buffer on Si(111) can support vertical nanowire growth with morphology and crystal quality comparable to growth on bulk InAs(111)B; in the InAs/Si case, nanowire lengths and diameters were statistically indistinguishable from bulk InAs controls, which was taken as evidence that the surface was predominantly single-polarity (111)B with minimal antiphase domain coverage (0903.4146). On amorphous SiO7, Ni nanoparticles formed by dewetting 8, 9, and 0 nm Ni films produced InAs nanowires with diameters 1, 2, and 3 nm, respectively, establishing a non-Au route that remained compatible with high-yield growth and later large-area assembly (0807.0946).
Catalyst-free selective-area growth has provided a separate path to epitaxial InAs nanowires on silicon. Direct vapor–solid growth on patterned Si(111) showed that nanowire diameter is controlled by mask opening size, interwire spacing, and growth time; for short growth times and small openings, diameters down to about 4 nm were obtained, while a reverse-reaction thinning scheme based on thermal decomposition under controlled As flux reduced sparse-array nanowires to about 5 nm diameter (Giudice et al., 2020). That reverse-reaction process exhibited a distinct interwire-spacing dependence: dense arrays retained diameter and became pencil-shaped, whereas sparse arrays underwent strong sidewall thinning, a behavior interpreted as a kinetic consequence of local arsenic re-emission from neighboring decomposing nanowires (Giudice et al., 2020). Low-temperature transport on such ultrathin wires later resolved one-dimensional sub-band conductance steps, confirming that the geometric scaling had crossed into a genuinely quantized regime (Giudice et al., 2020).
For compound-semiconductor nanowire growth more generally, a dual-adatom diffusion-limited model has been formulated in which the current of each constituent to the seed is written as
6
and the actual elongation rate is controlled by the smaller of the group-III and group-V currents,
7
Applied to Au-catalyzed MBE growth of InAs nanowires, this framework extracted 8, 9 nm, 0 nm, 1 nm, 2, 3, and 4 nm, and it showed that the limiting species can switch during growth as a function of radius, length, and flux ratio (Mosiiets et al., 2024). The model reproduces the observed maximum in length versus radius, the sharp small-radius cutoff set by the Kelvin-enhanced As evaporation term, and the transition from As-limited to In-limited behavior as V/III ratio increases (Mosiiets et al., 2024).
In in-plane selective-area growth on InP(001), atomic hydrogen was shown to widen the selectivity window of InGaAs and thereby enable closely lattice-matched In5Ga6As buffer and capping layers around InAs channels grown at 7C (Adhikari et al., 18 Feb 2025). This identifies an important theme in InAs nanowire growth: geometry control and interface control are inseparable. Diameter, aspect ratio, pitch, and flux ratio determine not only morphology, but also the attainable defect landscape and the subsequent transport regime.
3. Electronic transport regimes and diameter-dependent conduction
A characteristic high-field transport regime in InAs nanowires is space-charge-limited transport. Two-probe measurements on free-standing, non-intentionally doped nanowires showed low-bias Ohmic response 8 and high-bias quadratic response 9, with symmetric 0–1 curves despite dissimilar contacts and failure consistently near the wire midpoint rather than at the contacts (Katzenmeyer et al., 2010). In the nanowire geometry, the current density was described by
2
with 3 for high-aspect-ratio wires, and the coexistence of Ohmic and space-charge-limited regimes allowed extraction of
4
Using this method, the effective carrier concentration increased with decreasing radius and followed an empirical scaling 5, while mobility increased with radius, from about 6–7 at small radii to about 8–9 near 0 nm (Katzenmeyer et al., 2010). The effective carrier concentration lay in the approximate range 1–2, consistent with increasing dominance of surface accumulation as the cross-section narrows (Katzenmeyer et al., 2010).
Surface and interface scattering remain the principal low-temperature mobility limit unless the surface is deliberately engineered. In bare InAs nanowires, mobility typically increases on cooling down to about 3–4 K and then turns over, a behavior attributed to ionized impurity scattering from donor-like surface states; by contrast, InAs–In5Al6As core–shell nanowires exhibited a monotonic increase in mobility on cooling and reached about 7 at 8 K, which was interpreted as evidence for reduced low-temperature ionized impurity scattering and therefore reduced effective surface-state disorder (Holloway et al., 2012). The same work emphasized that the shell was epitaxial, 9–0 nm thick, and dislocation-free at the core–shell interface, supporting the view that the transport change was truly electronic rather than simply structural (Holloway et al., 2012).
In in-plane selectively grown nanowires, interface engineering has produced comparable gains. On GaAs(001), optimized In-rich In1Ga2As buffers beneath InAs transport channels yielded field-effect mobilities above 3, with a maximum of 4 at 5 K, roughly doubling the mobility relative to non-optimized structures (Beznasyuk et al., 2021). On InP(001), Hall measurements on in-plane InAs nanowires with In6Ga7As buffer and capping layers showed a mobility increase from about 8 to about 9, a mean free path increase from about 0 to about 1 nm, and a phase coherence length more than twice as large as in bare InAs channels (Adhikari et al., 18 Feb 2025). These data point consistently to interface roughness, lattice-mismatch-related defects, and exposed top surfaces as dominant disorder sources in selectively grown geometries.
At still smaller diameters, InAs nanowires cross from diameter-dependent scattering to genuine one-dimensional sub-band transport. In catalyst-free epitaxial nanowires on silicon with diameter about 2 nm and channel length about 3 nm, low-temperature back-gated transport exhibited pronounced conductance steps. Simulations and experiment were consistent with a transmission probability 4, a mean free path 5 nm, and single- and double-degenerate conductance steps that reflected the rotational hexagonal symmetry of the wire cross-section; realistic back-gate modeling further showed that gate-induced asymmetry can lift those degeneracies at finite bias (Giudice et al., 2020). This established that in InAs, because of the low effective mass, strong confinement effects emerge at comparatively larger diameters than in heavier-mass semiconductors.
4. Surface passivation, shell growth, and post-growth morphological engineering
Shell growth has been one of the most important routes for modifying InAs nanowire surfaces without abandoning crystalline coherence. In gas-source MBE, direct attempts to form InP shells on InAs were found to favor axial InAs–InP heterostructures rather than radial shells, because In adatom diffusion remained long-ranged and fed the Au catalyst efficiently (Haapamaki et al., 2011). Introducing Al into the shell alloy transformed the growth mode: InAs–Al6In7As and InAs–Al8In9P nanowires exhibited a marked shift from axial vapor–liquid–solid to radial vapor–solid growth, producing uniform shells with measured thickness 0 nm around cores of average diameter 1 nm; a direct-impingement model predicted a shell thickness of about 2 nm under the same conditions (Haapamaki et al., 2011). Structurally, AlInAs shells with lower mismatch showed no observable misfit dislocations, whereas AlInP shells with 3–4 mismatch exhibited Moiré fringes and misfit dislocations, indicating full or near-full relaxation (Haapamaki et al., 2011). This comparison established AlInAs as the more favorable shell material where defect minimization is a priority.
Passivation can also be pursued specifically to suppress surface-state scattering. Epitaxial In5Al6As shells not only altered low-temperature mobility trends, but did so while preserving single-crystalline wurtzite structure and dislocation-free interfaces (Holloway et al., 2012). The inferred mechanism was reduction of the effective ionized impurity disorder associated with the surface, either by directly changing the relevant interface states or by moving the dominant donor-like states farther from the conducting core (Holloway et al., 2012). A plausible implication is that in InAs nanowires, “passivation” often means electrostatic relocation of disorder as much as chemical elimination of it.
Post-growth morphological engineering has broadened the accessible device space beyond what growth alone can provide. Three wet-etch methods—piranha etching with self-aligned contacts, galvanic etching with self-aligned contacts, and alkaline ammonium-polysulfide etching—were developed for sub-7 nm post-growth reshaping of individual InAs nanowires (Fülöp et al., 2016). The acidic methods enabled sharply thinned segments adjacent to or beneath contacts, whereas the alkaline method produced asymmetric double-cone profiles with angles about 8 and 9, a thinnest diameter near $120$0 nm, and an etch rate of about $120$1 nm/min at the constriction (Fülöp et al., 2016). Low-temperature transport on such etched structures showed stable Coulomb blockade from single quantum dots, with charging energies about $120$2 meV in a galvanically etched device and about $120$3 meV in an alkaline-etched double-cone device (Fülöp et al., 2016). These geometries were explicitly proposed as building blocks for smooth tunnel barriers, quantum point contacts, and topological-device barriers (Fülöp et al., 2016).
Localized surface chemistry can also be induced optothermally. By suspending InAs nanowires across $120$4-wide, $120$5 nm deep substrate trenches and irradiating them with a focused $120$6 nm laser at about $120$7, local oxidation was confined to the suspended segment, as detected by Raman peaks at about $120$8 and $120$9 associated with crystalline arsenic (Tanta et al., 2016). Numerical simulations yielded temperature gradients of about 00 near trench edges, consistent with oxidation onset over a length scale of about 01–02 nm (Tanta et al., 2016). Electrically, the oxidized nanowire remained conducting, but with conductance reduced by a factor of about 03–04, consistent with a thinner effective InAs core and increased surface scattering (Tanta et al., 2016). This suggests that nanoscale chemical editing of InAs nanowires can be used to create localized barriers without completely interrupting the channel.
5. Hybrid superconducting structures and quantum-dot architectures
InAs nanowires have become a standard semiconductor component in hybrid superconductor devices because they combine strong spin–orbit coupling and gate tunability with the possibility of forming epitaxial superconductor interfaces. Ultra-thin InAs nanowires grown by MBE with Ag catalysts and coated in situ with epitaxial Al achieved diameters predominantly in the 05–06 nm range, substantially smaller than the 07 nm diameters commonly used previously, and transmission electron microscopy showed pure-phase crystal structure and an atomically sharp, uniform InAs–Al interface (Pan et al., 2020). Transport on these hybrids resolved a hard induced gap, 08-periodic Coulomb blockade at zero field, and a large zero-bias conductance peak reaching 09 of 10 (Pan et al., 2020). The structural motivation was explicit: reducing the InAs diameter suppressed stacking faults and twin defects, thereby lowering disorder at the semiconductor–superconductor interface and reducing the probability of trivial subgap states that can mimic Majorana signatures (Pan et al., 2020).
A complementary architecture used fully covered InAs nanowires with epitaxial Al as metallic-style single-electron transistors with fixed Al/AlO11 tunnel barriers rather than gate-defined few-channel barriers (Taupin et al., 2016). In that geometry the proximized island exhibited a hard superconducting gap with 12–13, charging energies in the range 14–15, and subgap-to-normal conductance ratios down to about 16 at zero bias in the most detailed device (Taupin et al., 2016). The same study also showed that a thin GaAs protective shell between InAs and Al prevented unwanted extra quantum dots associated with exposed InAs surfaces, thereby stabilizing the intended single-island behavior (Taupin et al., 2016). This clarified a recurrent issue in InAs quantum devices: surface-defined parasitic dots are not incidental artifacts but a predictable outcome of leaving chemically vulnerable InAs segments exposed.
Gate-defined quantum dots remain a separate but equally important InAs nanowire application. Buried TiN bottom gates fabricated by trench fill and polishing achieved gate pitches as small as 17 nm with low leakage, and InAs nanowires placed across these gates showed single-electron tunneling and Coulomb blockade (Faustmann et al., 2024). In those devices, charging energies were about 18–19 meV and plunger-gate lever arms ranged from about 20 to 21, while a tunnel-coupled Al half-shell introduced a proximitized gap with upper bound 22 meV (Faustmann et al., 2024). The study emphasized that InAs surface states can lead to parasitic quantum dots and can alter lever arms and effective gate potentials, so flat buried-gate architectures were proposed partly to reduce dielectric roughness and charge trapping relative to conventional lift-off-defined bottom gates (Faustmann et al., 2024).
Taken together, these results show that superconducting and quantum-dot applications of InAs nanowires are constrained less by the abstract existence of a small-gap, high-mobility channel than by precise control of diameter, exposed surface length, shell composition, and gate geometry. The distinction between intended quantum confinement and unintended surface-defined confinement is one of the central practical issues in the field.
6. Optical, plasmonic, thermal, and thermoelectric behavior
InAs nanowires are also notable optical and energy-transport systems. Arrays of vertically oriented InAs nanowires grown by MOVPE emitted intense far-infrared pulses with a THz radiation power efficiency about 23 times higher than a planar InAs substrate when normalized by active volume (Seletskiy et al., 2011). The origin was traced not to a simple bulk plasmon but to a low-energy acoustic surface plasmon mode specific to high-aspect-ratio cylindrical geometry, excited by a photo-Dember current and radiating efficiently because the nanowire geometry strongly suppresses total internal reflection losses that dominate planar InAs (Seletskiy et al., 2011). Transport measurements on individual wires gave carrier densities around 24 and bulk-plasmon estimates around 25 THz, whereas the observed emission remained in the few-THz range, which the cylindrical surface-plasmon model reconciled (Seletskiy et al., 2011).
Thermal transport is likewise strongly geometry- and defect-dependent. Intentional Joule-breakdown experiments on free-standing InAs nanowires showed that the wire consistently failed near its midpoint, not at the contacts, supporting the picture of bulk-limited rather than contact-limited current flow (Katzenmeyer et al., 2010). Using a one-dimensional heat-flow model and assuming breakdown begins near 26 K, the average thermal conductivity was extracted as
27
about one third of high-quality bulk InAs (Katzenmeyer et al., 2010). The reduction was attributed to stacking faults and wurtzite/zincblende interfaces acting as strong phonon scatterers (Katzenmeyer et al., 2010). This coexistence of moderate electrical mobility and poor thermal conductivity was explicitly identified as attractive for thermoelectric applications (Katzenmeyer et al., 2010).
That thermoelectric possibility has been examined directly in full-band atomistic simulations. For 28-type [100] InAs nanowires from 29 nm down to 30 nm diameter, tight-binding plus linearized Boltzmann transport calculations found that strong sub-band quantization raises the Seebeck coefficient substantially once the diameter is reduced below 31 nm (Archetti et al., 2020). Under phonon-limited conditions the thermoelectric power factor showed an improvement of about 32 around 33 nm, but inclusion of surface roughness scattering with 34 nm and 35 nm reduced that improvement to about 36; at 37 nm the power factor diminished (Archetti et al., 2020). The same study therefore argued that low effective-mass materials such as InAs can display low-dimensional thermoelectric benefits at larger diameters than Si, but that surface roughness also becomes strong enough to remove much of the anticipated gain (Archetti et al., 2020). This suggests an optimum near 38 nm rather than monotonic improvement with decreasing diameter.
The broader picture is that optical phonons, plasmons, thermal conductivity, and thermoelectric coefficients in InAs nanowires all depend on the same underlying set of structural variables—diameter, polytypism, interface density, and surface condition—that govern electronic transport. For that reason, InAs nanowires are best understood not as a single material system but as a family of strongly geometry-coupled one-dimensional heterostructures whose electrical, optical, and thermal responses are co-engineered.