HCT-DMG: Dual-Material TFET & Crossmodal Transformer

• HCT-DMG TFETs are defined by a dual-material gate structure that exploits different work functions to boost on-current and suppress leakage via improved band-to-band tunneling.
• Dynamic modality gating in the hierarchical crossmodal transformer adapts batch-level softmax scores to fuse multimodal signals, achieving state-of-the-art affect recognition.
• Both implementations of HCT-DMG address unique domain challenges, offering scalable low-power electronics and efficient multimodal deep learning solutions.

HCT-DMG refers to two distinct topics in the scientific literature: (1) "High-k Channel Tunnel FET with Dual-Material Gate", a nanoscale tunnel field-effect transistor (TFET) architecture employing a dual-material gate to enhance device performance (Saurabh et al., 2011); and (2) "Hierarchical Crossmodal Transformer with Dynamic Modality Gating", an incongruity-aware deep learning architecture for multimodal affect recognition (Wang et al., 2023). This article provides a comprehensive overview of both, as each is established in its respective domain using the HCT-DMG acronym.

1. Dual-Material Gate Tunnel FETs: Definitions and Device Principles

HCT-DMG TFETs are nanotransistor architectures incorporating a high-k dielectric channel (e.g., HfO₂) and a dual-material gate (DMG) stack. The DMG consists of two gate materials—with distinct work functions—placed sequentially along the channel. The source-side "tunnel-gate" (M₁) possesses a low work function to maximize band-to-band tunneling (BTBT) for high on-current (I_on), whereas the drain-side "auxiliary-gate" (M₂) uses a higher work function to increase the tunneling barrier, thus suppressing off-current (I_off) and improving subthreshold swing (SS) and drain-induced barrier lowering (DIBL).

Key device stack parameters include:

• Channel: strained Si₁₋ₓGeₓ on insulator, t_si = 10 nm, Ge fraction x = 0.2–0.5
• Dual gates: M₁ (φ_M1 ≈ 4.0–4.3 eV), M₂ (φ_M2 ≈ 4.4–4.7 eV)
• High-k gate oxide: 2–3 nm HfO₂ (k ≈ 21–25)
• Channel length L = L₁ + L₂, scalable to 25 nm
• Source/drain: N⁺/P⁺, doping optimized for junction abruptness

The rationale for the DMG structure is to decouple the optimization targets for BTBT (source) and leakage suppression (drain), which is not possible in single-material gate (SMG) designs.

2. Band Structure, Tunneling Mechanism, and Analytical Modeling

The DMG TFET operation is defined by the electrostatic impact of the gate materials on the channel profile. Under bias:

• The tunnel-gate (M₁) induces strong band bending at the source junction under on-state conditions, creating a narrow high-field BTBT region.
• The auxiliary-gate (M₂) maintains a wider tunneling barrier at the drain, even when a large V_DS is applied, thus minimizing leakage.
• The local BTBT generation rate is given by the Kane model:

$$G(x) = A \, E(x)^2 \exp\left(-\frac{B}{E(x)}\right)$$

where A, B are constants dependent on channel material parameters, and E(x) is set by the local electrostatics. Analytical expressions for threshold voltage (V_T), subthreshold swing (SS_avg), and DIBL are formally derived and include explicit dependence on the DMG work-function difference Δφ = φ_M1 – φ_M2.

A summary table of simulation metrics demonstrates substantial improvement for HCT-DMG TFETs over SMG designs:

Device	I_on (mA/μm)	I_off (fA/μm)	SS_avg (mV/dec)	DIBL (mV)
SMG	0.11	<1	34	86
DMG	0.351	<1	21	43

Parameter ranges for optimal HCT-DMG design include t_ox = 2–3 nm, Δφ = –0.3 to –0.5 eV, and channel Ge content x depending on supply voltage (Saurabh et al., 2011).

3. System-Level Performance and Design Implications

At the system level, HCT-DMG TFETs deliver:

• Enhanced on-current due to improved fields at the source
• Robust suppression of off-state leakage and sub-30 mV/decade SS
• Reduced DIBL, supporting scalability below 30 nm
• Lower saturation voltages and improved drive characteristics, as shown by comparisons of transfer/output curves

Design trade-offs include fabrication complexity at sub-20 nm and the need for precise gate work-function engineering. The DMG approach generalizes to alternate channels (Ge, III-V), advanced dielectrics (Al₂O₃/HfO₂), and ultra-low-power regimes (V_DD < 0.5 V) (Saurabh et al., 2011).

4. Hierarchical Crossmodal Transformer with Dynamic Modality Gating in Multimodal Affect Recognition

HCT-DMG in the context of deep learning refers to a model for alleviating inter-modal incongruity in affective computing. The architecture introduces two main innovations:

• A two-step fusion hierarchy: two auxiliary modalities (from {Text, Audio, Vision}) are first fused, then the selected "primary" modality is conditioned on the fused representation.
• Dynamic Modality Gating (DMG): a batch-level adaptive mechanism that selects the primary modality per mini-batch by learning scalar scores (softmax-normalized), scaling modalities, and dynamically permuting roles.

The HCT-DMG architecture stages:

1. Feature Encoding: Conv1D and GRU layers encode raw input sequences (GloVe/BERT for text, COVAREP/WavLM for audio, FACET for vision).
2. Two-Step Hierarchical Crossmodal Attention: Crossmodal Transformer blocks perform attention-driven fusion in the specified hierarchy.
3. Final Aggregation: Outputs are reweighted and concatenated into a final feature for downstream prediction.
4. Dynamic Modality Selection: Softmax scores drive primary/auxiliary assignment every batch, freezing after convergence.

5. Empirical Evaluation and Comparative Metrics

Experimental results across affect recognition benchmarks (CMU-MOSI, MOSEI, IEMOCAP, UR-FUNNY, MUStARD) demonstrate HCT-DMG achieves or matches state-of-the-art accuracy and F1 with significantly fewer parameters (≈0.8M) compared to prior models (MulT = 1.07M, LMF-MulT = 0.86M, LF-LSTM = 1.24M). Key metrics include Acc7, Acc2, F1, MAE, and Pearson correlation.

Ablation studies indicate dynamic gating is responsible for consistent performance gains of 0.3–0.5% on accuracy/F1. Hard-sample qualitative analysis further reveals superior handling of incongruity at the attention heatmap level (Wang et al., 2023).

6. Interpretation, Applicability, and Future Directions

In TFET device research, HCT-DMG structures provide a path toward simultaneously improving all key transistor metrics (I_on, I_off, SS, DIBL), essential for next-generation low-power and high-performance electronic circuits (Saurabh et al., 2011).

In multimodal deep learning, HCT-DMG offers an efficient and effective framework for robust affect recognition, specifically addressing the persistent challenge of inter-modal incongruity. Its parameter efficiency and adaptability recommend it for mobile or resource-constrained deployment, and its explicit modality-selection mechanism facilitates interpretability.

Further advances are plausible via:

• Extending the DMG paradigm to non-affective multimodal problems and exploring alternative transformer-based fusion hierarchies.
• Applying the HCT-DMG device concept to emerging channel and dielectric materials and integrating process advancements for manufacturability below 10 nm.

Both usages of HCT-DMG thus represent significant and domain-specific methodologies, explicitly named and formalized in recent literature (Saurabh et al., 2011, Wang et al., 2023).