GeSe/PbSnSe/GaAs Mid-IR LEDs

• GeSe/PbSnSe/GaAs LEDs are mid-infrared electroluminescent heterostructures that integrate a PbSnSe narrow-gap active layer, GaAs substrate, and a GeSe cap for defect management and carrier confinement.
• They employ a type-I band alignment and designed epitaxial stacking to efficiently confine carriers in PbSnSe, mitigating nonradiative losses and addressing lattice-mismatch challenges.
• Optimization strategies include reducing the GeSe-induced series resistance, increasing Sn content for longer wavelength emission, and improving film quality to enhance performance.

GeSe/PbSnSe/GaAs LEDs are mid-infrared electroluminescent heterostructures in which a IV-VI narrow-gap active region, specifically Pb$_{0.93}$Sn$_{0.07}$Se, is integrated on p-type GaAs through a lattice-mismatched hybrid IV-VI/III-V junction and capped by GeSe. In the reported implementation, incorporation of 7% Sn extends emission to $5\,\mu\text{m}$ in GeSe/PbSnSe/GaAs LEDs with output powers up to $45\,\mu\text{W}$, while the broader hybrid platform is motivated by the intrinsically low Auger-Meitner recombination rates of IV-VI semiconductors and the maturity of the III-V materials platform (Meyer et al., 13 Aug 2025).

1. Device class and operating objective

The GeSe/PbSnSe/GaAs LED is a room-temperature mid-IR source intended to occupy the application space between narrow linewidth, expensive lasers and broadband, inefficient thermal globars. The specific structure belongs to a family of lattice-mismatched hybrid IV-VI/III-V heterojunctions in which GaAs provides mechanical support and the p-side of the LED, while PbSnSe provides the narrow-gap emissive region and GeSe functions as the top cap (Meyer et al., 13 Aug 2025).

The reported GeSe/PbSnSe/GaAs device is designed around a type-I alignment. Under forward bias, both electrons and holes are confined in PbSnSe, enabling efficient radiative recombination. This is significant because the active layer exploits a material system, PbSnSe, for which the Auger coefficient $C$ is intrinsically low compared to III-V narrow-gap alloys. A plausible implication is that the architecture is meant to mitigate one of the central room-temperature limitations of III-V mid-IR LEDs, namely strong nonradiative Auger-Meitner recombination.

The work is also framed by a materials challenge: the $\sim 8\%$ lattice mismatch between GaAs and PbSnSe. Rather than removing this mismatch, the architecture mediates it through growth protocol, thickness control, and post-growth thermal processing. The device therefore combines a severe heteroepitaxial constraint with an operating electroluminescent junction, making defect tolerance part of the subject itself rather than a secondary fabrication issue.

2. Epitaxial stack and heterostructure design

The reported heterostructure is grown on p-type GaAs(001) epi-ready wafers, described as Si-doped, $\sim 10^{18}$–$10^{19}\,\text{cm}^{-3}$. All layer thicknesses are nominal, after RTA and SiO$_2$ cap.

Layer	Nominal thickness	Reported role or condition
PbSe nucleation layer	25 nm	Grown at $330\,^\circ\text{C}$ under PbSe flux until $_{0.07}$0 RHEED streaks
Additional PbSe	37.5 nm	Grown at $_{0.07}$1
Pb$_{0.07}$2Sn$_{0.07}$3Se active layer	150 nm	Grown at $_{0.07}$4
Sb-doped n-type region in PbSnSe	Last 10 nm	$_{0.07}$5 via Sb co-flux
GeSe cap	60 nm	Amorphous at $_{0.07}$6, crystallized to orthorhombic GeSe by $_{0.07}$7 RTA
SiO$_{0.07}$8 cap	110–120 nm	$_{0.07}$9 plasma CVD, then $5\,\mu\text{m}$0 RTA

Accommodation of the $5\,\mu\text{m}$1 lattice mismatch proceeds through cube-on-cube epitaxy via a two-step “high-T PbSe exposure/low-T buffer” nucleation: PbSe flux at $5\,\mu\text{m}$2 cleans and seeds GaAs, then growth is lowered to $5\,\mu\text{m}$3 for thick IV-VI deposition (Meyer et al., 13 Aug 2025). Cracking associated with the coefficient-of-thermal-expansion mismatch, given as $5\,\mu\text{m}$4, is limited by keeping the total IV-VI thickness $5\,\mu\text{m}$5 at low temperature and using ex-situ SiO$5\,\mu\text{m}$6-capped RTA at $5\,\mu\text{m}$7.

The paper also gives a cross-sectional device sketch: top Ti/Au contact, $5\,\mu\text{m}$8 c-GeSe cap, $5\,\mu\text{m}$9 n-Pb$45\,\mu\text{W}$0Sn$45\,\mu\text{W}$1Se, $45\,\mu\text{W}$2 PbSe, $45\,\mu\text{W}$3 PbSe nucleation, p-GaAs, and Ti/Pd/Au bottom contact. This stack establishes the device as a double-heterojunction configuration in which GeSe is not merely a passivation layer but part of the transport and optical problem. A plausible implication is that the cap simultaneously stabilizes the IV-VI surface and introduces an electrical penalty, which becomes explicit in the measured series resistance.

3. Band alignment and carrier injection

The band-structure description is based on literature electron affinities and bandgaps. The reported values are $45\,\mu\text{W}$4 with $45\,\mu\text{W}$5, $45\,\mu\text{W}$6 (7% Sn) $45\,\mu\text{W}$7 with $45\,\mu\text{W}$8 corresponding to $45\,\mu\text{W}$9, and $C$0 with $C$1 (Meyer et al., 13 Aug 2025).

The conduction- and valence-band offsets are stated as

$C$2

and

$C$3

Within this representation, the GaAs/PbSnSe junction is type-I. Under forward bias, both electrons and holes are confined in PbSnSe. The accompanying energy-band description states that large $C$4 and $C$5 at both GaAs/PbSnSe and PbSnSe/GeSe form electron and hole barriers, and that carriers overcome these by thermionic emission and recombine in PbSnSe.

Carrier injection is described in terms of doping and transport. The n-PbSnSe region, specifically the last $C$6, is Sb-doped to $C$7 with $C$8–$C$9. The p-GaAs substrate is $\sim 8\%$0–$\sim 8\%$1 according to vendor specification. Carrier transport across the GaAs/PbSnSe junction proceeds by thermionic emission over $\sim 8\%$2 and $\sim 8\%$3 under moderate forward bias of $\sim 8\%$4–$\sim 8\%$5. At high current densities, tunneling through the thin GeSe cap or depleted regions may contribute, but series resistance from GeSe dominates. This transport picture identifies the GeSe cap as a central electrical bottleneck rather than a neutral encapsulation layer.

4. Defects, recombination, and efficiency limitations

The defect analysis is framed around threading dislocation density (TDD), extracted from the (224) rocking-curve FWHM $\sim 8\%$6 using

$\sim 8\%$7

For PbSnSe, the reported TDD is $\sim 8\%$8 as-grown and $\sim 8\%$9 after RTA (Meyer et al., 13 Aug 2025). Despite this high TDD, room-temperature PL improves $\sim 10^{18}$0 after RTA for $\sim 10^{18}$1 PL, and the LEDs operate with only modest SRH losses, indicating that point defects dominate nonradiative recombination more than dislocations.

This point addresses a likely misconception in the interpretation of highly mismatched heteroepitaxy. A common expectation is that a TDD on the order of $\sim 10^{18}$2 would preclude room-temperature LED operation. The reported result does not remove the relevance of dislocations, but it does show that, in this system, operation persists despite TDD on the order of $\sim 10^{18}$3. The authors explicitly connect this to the relative importance of point defects in the present nonradiative budget.

The recombination model is summarized using the radiative and Auger-Meitner terms

$\sim 10^{18}$4

and

$\sim 10^{18}$5

The IV-VI advantage is stated directly: PbSnSe exhibits intrinsically low Auger coefficient $\sim 10^{18}$6 compared to III-V narrow-gap alloys, reducing high-current droop. Wall-plug efficiency is defined as

$\sim 10^{18}$7

For the $\sim 10^{18}$8 GeSe/PbSnSe/GaAs LED, the measured peak $\sim 10^{18}$9 is $10^{19}\,\text{cm}^{-3}$0 at room temperature under 1% duty cycle. In the broader device family reported in the same work, electrically injected n-PbSe/p-GaAs LEDs emit at $10^{19}\,\text{cm}^{-3}$1 with output powers up to $10^{19}\,\text{cm}^{-3}$2 under pulsed operation and a peak wall plug efficiency of $10^{19}\,\text{cm}^{-3}$3 at room temperature, approaching the performance of commercial III-V LEDs at similar wavelengths. This contrast situates the GeSe/PbSnSe/GaAs device as the longer-wavelength member of the hybrid platform, but also as the more strongly transport-limited implementation.

5. Optical and electrical characteristics

The GeSe/PbSnSe/GaAs LED emits with center wavelength $10^{19}\,\text{cm}^{-3}$4 and FWHM $10^{19}\,\text{cm}^{-3}$5–$10^{19}\,\text{cm}^{-3}$6 under pulsed injection (Meyer et al., 13 Aug 2025). Under pulsed operation at $10^{19}\,\text{cm}^{-3}$7 and 1% duty cycle, the output power is reported as $10^{19}\,\text{cm}^{-3}$8 at $10^{19}\,\text{cm}^{-3}$9 and rises to $_2$0 at $_2$1, corresponding to current densities up to $_2$2.

The room-temperature four-wire $_2$3–$_2$4 characteristics show on/off rectification $_2$5 at $_2$6, with turn-on near $_2$7, described as close to the PbSnSe bandgap. The zero-bias $_2$8 is $_2$9–$330\,^\circ\text{C}$0, and the high series resistance is dominated by the $330\,^\circ\text{C}$1 GeSe layer and the double-heterojunction barriers. The representative curves are described as exponential $330\,^\circ\text{C}$2–$330\,^\circ\text{C}$3 with a series-resistance knee at $330\,^\circ\text{C}$4, and $330\,^\circ\text{C}$5–$330\,^\circ\text{C}$6 behavior showing sublinear roll-off at high current due to heating and Auger losses.

Temperature dependence follows the inverted bandgap-versus-temperature behavior of the IV-VI active material: the electroluminescence shifts to longer wavelengths with heating. Performance is further limited by self-heating under high duty cycle. This links the optical output not only to intrinsic recombination physics but also to resistive and thermal design choices, especially the presence of the GeSe cap and the resulting current-spreading and heat-generation conditions.

6. Interpretation, optimization pathways, and application scope

The reported GeSe/PbSnSe/GaAs LEDs are presented as the first devices of this specific form to demonstrate viable $330\,^\circ\text{C}$7 emission despite an $330\,^\circ\text{C}$8 lattice mismatch and $330\,^\circ\text{C}$9 (Meyer et al., 13 Aug 2025). The central interpretation is that hybrid IV-VI/III-V heterojunction architectures can remain operational even when lattice mismatch produces high dislocation densities, provided that point-defect-related nonradiative recombination is reduced and carrier confinement is maintained in the IV-VI active layer.

The outlook section identifies several optimization routes. One is to replace the insulating GeSe cap with a wide-gap, conductive, oxidation-resistant barrier such as Bi$_{0.07}$00S$_{0.07}$01 in order to reduce series resistance and heating. Another is to increase Sn content to $_{0.07}$02 so as to push emission deeper into the $_{0.07}$03–$_{0.07}$04 window with modest PL penalty. Additional proposals are to improve IV-VI film quality by lowering point-defect density, to adopt backside emission or nano-patterned extraction schemes such as metalenses or photonic crystals to overcome total internal reflection in high-index layers, and to optimize top-contact grid spacing or full-coverage backside emitters for uniform current spreading.

These directions indicate that the present limitation is not solely the feasibility of hybrid growth, which has already been demonstrated, but the co-optimization of transport, defect chemistry, extraction, and thermal management. The stated application targets are on-chip gas sensing, environmental monitoring, and biomedical spectroscopy. This suggests that the GeSe/PbSnSe/GaAs LED is best understood not as a finalized emitter geometry, but as a materials-platform demonstration for compact, room-temperature mid-IR sources in a wavelength range where neither conventional III-V LEDs nor thermal emitters are fully satisfactory.