FAST-LoRa: Multifaceted Acceleration Designs

• FAST-LoRa is a multipurpose framework that includes continual knowledge graph embedding via graph layering and incremental low-rank adapters, reducing retraining time by up to 68% while mitigating forgetting.
• It optimizes neural network training by reordering equivalent LoRA computations through shape-aware selection, achieving up to 28% speedup and notable memory savings.
• In LoRaWAN systems, FAST-LoRa replaces packet-level discrete-event simulation with analytical models and matrix operations, enabling rapid evaluation of network parameters with orders-of-magnitude runtime reduction.

Searching arXiv for papers on FAST-LoRa and closely related usages. arXiv search query: FAST-LoRa Searching more narrowly for the specific cited papers. FAST-LoRa is an overloaded term in recent arXiv literature. In one line of work, it denotes Fast and Continual Knowledge Graph Embedding via Incremental LoRA, a continual knowledge graph embedding framework built around graph layering and incremental low-rank adapters. In another, it denotes a lightweight analytical simulation framework for LoRaWAN intended for rapid evaluation of transmission-parameter strategies. In a broader descriptive sense, “fast-LoRA” also refers to execution strategies for low-rank adaptation in neural networks that accelerate mathematically equivalent LoRA computations by changing graph realization rather than changing the underlying method. Related LoRa-system literature further develops adjacent “fast LoRa” ideas through physical-layer aggregation and fast-hopping uplink designs (Liu et al., 2024, García et al., 31 Jul 2025, Cherniuk et al., 2023, You et al., 2022, Boquet et al., 2020).

1. Terminological scope and disambiguation

Disambiguation is necessary because the literature mixes two unrelated technical families: LoRA as low-rank adaptation in machine learning, and LoRa as Long Range radio technology. The acronym overlap is superficial; the underlying problem classes, models, and evaluation protocols are distinct.

Usage	Domain	Core idea
FAST-LoRa / FastKGE	Continual knowledge graph embedding	Graph layering, incremental LoRA, adaptive rank allocation
fast-LoRA / RunLoRA	Neural network training and fine-tuning	Shape-aware selection of equivalent forward/backward graphs
FAST-LoRa	LoRaWAN simulation	Analytical PDR/EE approximation with matrix-based reception
LoRaPDA	LoRa physical layer	MPR-based digital aggregation from simultaneous transmissions
LR-FHSS	LoRaWAN physical layer	Fast frequency hopping, fragmentation, and redundancy

The most explicit use of the exact name FAST-LoRa appears in two different settings. One is the CKGE framework called Fast and Continual Knowledge Graph Embedding via Incremental LoRA, which is also referred to as FastKGE. The other is the 2025 LoRaWAN simulator titled “FAST-LoRa: An Efficient Simulation Framework for Evaluating LoRaWAN Networks and Transmission Parameter Strategies.” By contrast, RunLoRA is not itself named FAST-LoRa, but the paper explicitly situates it within a broader “fast-LoRA-style” implementation perspective, namely specialized execution strategies for LoRA that reorder the same computations to reduce overhead (Liu et al., 2024, García et al., 31 Jul 2025, Cherniuk et al., 2023).

2. FAST-LoRa as continual knowledge graph embedding

In continual knowledge graph embedding, FAST-LoRa addresses the problem of updating a knowledge graph embedding model as the graph grows, while preserving old knowledge and avoiding the cost of full retraining. The knowledge graph is modeled as a sequence of snapshots,

$$\mathcal{G}=\{\mathcal{S}_{0}, \mathcal{S}_{1}, ..., \mathcal{S}_{n}\},$$

with each snapshot

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$

and new information defined by

$$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$

The method targets two issues simultaneously: mitigating catastrophic forgetting and learning new knowledge efficiently as the KG grows (Liu et al., 2024).

The framework has three stages. First, it performs graph layering: new entities are sorted by BFS distance from the old KG and then by degree centrality, producing a sorted sequence

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$

with degree-centrality score

$$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$

The entities are then split into $N$ layers,

$\overline{E} = \{E_1, E_2, ..., E_N\},$

while new relations are collected into a single relation layer. Second, it performs incremental low-rank adapter learning (IncLoRA), representing the $k$-th entity layer by

$\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$

where $\mathbf{A}_k$ and $$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$0 are trainable low-rank factors and the rank satisfies

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$1

Third, inference concatenates all learned adapters from past snapshots with the original embeddings, and the model performs standard link prediction with no extra inference-time mechanism.

A central contribution is adaptive rank allocation. Rather than using a fixed base rank for all layers, the framework allocates larger ranks to more important layers, where importance is measured by degree centrality. For layer $$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$2,

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$3

and

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$4

The layer rank is then

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$5

This makes LoRA “aware of the importance of entities,” with more structurally central layers receiving more capacity.

Training uses TransE as the base KGE model with a margin-based ranking loss on new triples,

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$6

and scoring function

$$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$7

Only the LoRA groups for the current snapshot are trained; all older LoRA groups and original embeddings are frozen. This freezing, together with graph layering, is the method’s main mechanism for mitigating catastrophic forgetting.

The evaluation covers six datasets: the traditional CKGE datasets ENTITY, RELATION, FACT, and HYBRID, plus two larger-scale datasets FB-CKGE and WN-CKGE. On the four public datasets, the method reduces training time by 34\%–49\% while maintaining competitive link prediction performance, with average MRR of 21.0\% versus 21.1\% for state-of-the-art models. On the two newly constructed datasets, it saves 51\%–68\% training time and improves link prediction performance by 1.5\%. Ablations show that removing IncLoRA substantially degrades both efficiency and retention, whereas removing graph layering yields a modest performance decrease and slightly faster training. The method is also tested with ComplEx and RotatE, where it shows better performance than direct fine-tuning and substantial training-time reductions. The reported weakness on RELATION and FACT is attributed to the smaller number of entity changes, which makes the low-rank entity-oriented design less advantageous (Liu et al., 2024).

3. fast-LoRA execution in neural network training

In neural network training, FAST-LoRa is best understood not as a new low-rank method, but as a specialized execution strategy for LoRA. The clearest formulation of this idea is RunLoRA, which argues that although LoRA reduces trainable parameters, the implementation of the LoRA forward and backward pass is often suboptimal because the same mathematical update can be expressed by multiple equivalent matrix-multiplication orders. RunLoRA formalizes this choice and selects a forward/backward variant using FLOPs- and time-based estimates, with the stated goal of faster training without sacrificing accuracy (Cherniuk et al., 2023).

For a linear layer with weight $$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$8, input $$\mathcal{S}_{i} = (\mathcal{E}_{i}, \mathcal{R}_{i}, \mathcal{T}_{i}),$$9, and LoRA factors $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$0, the usual forward computation is

$$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$1

but the paper also notes the algebraically equivalent merged form

$$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$2

The relevant dimensions are $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$3 for input dimension, $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$4 for output dimension, $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$5 for LoRA rank, $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$6 for batch size, and $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$7 for sequence length. The key observation is that the best parenthesization depends on the concrete shapes: when $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$8 is large, the workload associated with the layer multiply can dominate; when $$\Delta \mathcal{T}_{i} = \mathcal{T}_{i} - \mathcal{T}_{i-1}, \quad \Delta \mathcal{E}_{i} = \mathcal{E}_{i} - \mathcal{E}_{i-1}, \quad \Delta \mathcal{R}_{i} = \mathcal{R}_{i} - \mathcal{R}_{i-1}.$$9 or the layer dimensions change, the balance among $$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$0, $$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$1, $$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$2, and $$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$3 terms changes.

The backward pass admits several algebraically equivalent formulations. Starting from

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$4

and using associativity,

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$5

the paper lists 8 algebraically equivalent backward formulations, then retains 5 major backward implementations after discarding variants that are never better in FLOP count. One implemented form is

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$6

while another uses the merged update

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$7

The selection logic is driven by explicit FLOP expressions, including

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$8

$$\mathbf{s}_{entity} = [e_1, e_2, ..., e_{|\Delta \mathcal{E}_i|}],$$9

$$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$0

and

$$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$1

RunLoRA’s forward variants also do not save the intermediate $$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$2 tensor in the autograd context, reducing memory usage. The abstract reports up to 28\% speedup on language modeling networks, while the detailed experimental summary reports Llama-family models from 60M to 1.3B parameters on a single Nvidia A100 80GB GPU in bfloat16, with speedups roughly from about 10\% to 17\% and memory savings reaching up to about 4 GB in some larger configurations. A representative example is the 60M model with rank 8, improving from 282.56 ms to 244.08 ms per forward-backward loop, a 13.62\% speedup (Cherniuk et al., 2023).

4. FAST-LoRa as a LoRaWAN simulation framework

In LoRaWAN systems, FAST-LoRa is a lightweight, analytically driven simulator aimed at repeated evaluation of transmission-parameter strategies. The framework is explicitly positioned not as a replacement for discrete-event simulators such as FLoRa or ns-3, but as an approximation tool for scenarios with uplink-heavy, relatively stable traffic, and homogeneous device behavior. Its motivating use cases include reinforcement learning or deep reinforcement learning for transmission control, large parameter sweeps, gateway-placement studies, and dense multi-gateway interference scenarios, where packet-level simulation becomes a computational bottleneck (García et al., 31 Jul 2025).

Its design rests on four principles: replacing packet-by-packet simulation with analytical models, assuming a single channel with a focus on intra-channel interference, computing gateway reception using matrix operations, and modeling only the metrics needed for transmission-parameter selection, namely Packet Delivery Ratio (PDR), Energy Efficiency (EE), and sampled RSS and SNR. The framework takes as input end-device positions

$$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$3

gateway positions

$$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$4

spreading factors $$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$5, and transmission powers $$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$6, and outputs $$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$7, sampled $$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$8, sampled $$f_{dc}(e) = \frac{f_{neighbor}(e)}{|\Delta \mathcal{E}_{i}| - 1}.$$9, $N$0, overall $N$1, and $N$2.

The reception model decomposes per-link reliability as

$N$3

where $N$4 is the probability that RSS exceeds sensitivity and $N$5 is the probability that interference does not corrupt the packet. The RSS model uses log-distance path loss with Gaussian shadow fading,

$N$6

with $N$7, and

$N$8

Interference is modeled through a vulnerable interval

$N$9

with overlap probability

$\overline{E} = \{E_1, E_2, ..., E_N\},$0

and SIR-threshold-based corruption probability

$\overline{E} = \{E_1, E_2, ..., E_N\},$1

Aggregating over other end devices gives

$\overline{E} = \{E_1, E_2, ..., E_N\},$2

and multi-gateway diversity is modeled as

$\overline{E} = \{E_1, E_2, ..., E_N\},$3

Energy efficiency is

$\overline{E} = \{E_1, E_2, ..., E_N\},$4

The implementation relies on NumPy and caching, with gateway reception expressed through bulk matrix computations rather than nested event loops. FAST-LoRa also reimplements Semtech’s ADR and ADR backoff logic. The ADR mechanism uses a buffer of maximum SNR across gateways over 20 measurements, then computes

$\overline{E} = \{E_1, E_2, ..., E_N\},$5

$\overline{E} = \{E_1, E_2, ..., E_N\},$6

after which spreading factor and transmission power are adjusted according to Semtech’s policy.

The evaluation uses FLoRa, a discrete-event OMNeT++-based simulator, as baseline. Common parameters include transmission powers

$\overline{E} = \{E_1, E_2, ..., E_N\},$7

spreading factors

$\overline{E} = \{E_1, E_2, ..., E_N\},$8

coding rate $\overline{E} = \{E_1, E_2, ..., E_N\},$9, bandwidth $k$0 kHz, preamble length $k$1, $k$2, $k$3, $k$4 for $k$5–10, $k$6 for $k$7–12, mean path loss $k$8, $k$9 m, $\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$0, packet generation rate $\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$1, and shadow fading standard deviation $\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$2. The experiments ran on an Intel Core i5-8265U with 8 GB RAM.

Three scenarios are reported: a single-ED single-GW validation with distances 20, 50, and 100 m over 120 hours of FLoRa simulation; a dense multi-gateway scenario with 10, 50, 100, and 500 EDs, 1 to 4 gateways, 5 random layouts per ED/GW combination, uniformly sampled ED positions in a 1 km $\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$3 1 km area, random SF and power assignments, and 5 days of FLoRa simulation; and a runtime-scaling experiment. In the dense scenario, FAST-LoRa attains average PDR MAE

$\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$4

average PDR SDE

$\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$5

average EE MAE

$\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$6

and average EE SDE

$\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$7

The worst reported case is 500 EDs and 4 GWs, with PDR MAE $\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$8 and EE MAE $\mathbf{E}_k = \mathbf{A}_k\mathbf{B}_k,$9 bits/mJ. The runtime gap is much larger: with 10 EDs, FAST-LoRa takes about 0.6 ms while FLoRa takes over 15 s; with 200 EDs, FLoRa takes over 5 minutes while FAST-LoRa remains under 8 ms. The reported speedup is up to three orders of magnitude (García et al., 31 Jul 2025).

5. Related fast LoRa aggregation at the physical layer

A related but distinct “fast LoRa” direction is LoRaPDA, which targets quick and reliable data aggregation in LoRa by coordinating a few nodes to transmit nearly simultaneously and using a new multi-packet reception receiver at the gateway. Unlike analog physical-layer aggregation, the approach is digital and gateway-side: the gateway first recovers individual users’ data from the phase-asynchronous superimposed signal and then computes aggregate functions such as sum, average, min, or max. The method is intended to be compatible with commercial off-the-shelf LoRa nodes and to tolerate small packet-arrival offsets, phase asynchrony, CFO, and TO without requiring transmitter-side phase or power synchronization (You et al., 2022).

The architecture has five steps: preamble detection, channel and offset estimation, symbol demodulation, soft channel decoding, and data aggregation. The received signal model for concurrent transmissions is

$\mathbf{A}_k$0

where $\mathbf{A}_k$1 is the number of nodes, $\mathbf{A}_k$2 the channel coefficient, $\mathbf{A}_k$3 the time offset, $\mathbf{A}_k$4 the CFO, and $\mathbf{A}_k$5 Gaussian noise. The paper emphasizes the distinction between CFO and TO: CFO induces a phase term continuously across symbol boundaries, whereas TO resets phase at symbol boundaries. For candidate sequence demodulation, the gateway reconstructs expected superimposed signals and solves a maximum-likelihood sequence problem. With frequency-bin observations, the log-likelihood is

$\mathbf{A}_k$6

Soft decoding retains the top-$\mathbf{A}_k$7 candidate sequences and feeds probabilistic information to a soft-input Hamming decoder.

The technical novelty is concentrated in three components: improved channel and offset estimation, symbol demodulation via maximum-likelihood sequence search, and soft-decision packet decoding. The estimation stage uses preambles and SFDs to separate CFO and TO, exploiting the fact that CFO shifts preambles and SFDs in the same direction whereas TO shifts them in opposite directions. The demodulator directly addresses the co-located peak problem, which arises when multiple users choose the same LoRa frequency bin in the same symbol. The soft decoder improves robustness when several candidate sequences have similar likelihood.

The reported results are substantial. The symbol demodulation algorithm outperforms the state-of-the-art MPR decoder by 5.3× in physical-layer throughput. LoRaPDA-Soft achieves about 10× lower BER than hard decoding at SNR $\mathbf{A}_k$8 dB for four-user concurrent transmissions. At the network level, LoRaPDA outperforms the state-of-the-art MPR scheme by at least 2.1× for all SNRs in throughput. The paper also reports CFO/TO MAE below 0.025 bins across the reported setup and channel MSE about 20 dB better than Choir. A plausible implication is that LoRaPDA addresses a different bottleneck from the simulator FAST-LoRa: it accelerates aggregate collection by exploiting concurrency at the receiver, rather than accelerating evaluation of network configurations (You et al., 2022).

6. Related fast-hopping LoRa physical layers

Another nearby interpretation of FAST-LoRa is LR-FHSS, a new LoRaWAN uplink physical layer designed for extremely long-range and large-scale communication scenarios, including satellite IoT. LR-FHSS preserves the same radio link budget as LoRa while increasing network capacity through fast frequency hopping, packet fragmentation, and redundancy. It is not standard LoRa; it is a new physical-layer option within the LoRaWAN ecosystem (Boquet et al., 2020).

The uplink process is structured as follows: a device chooses one enabled LR-FHSS channel using pure ALOHA, selects a random start subchannel, follows a pseudo-random hopping sequence, transmits the header with repetition, splits the payload into fragments of about 50 ms, and transmits those fragments on subchannels dictated by the hopping sequence. The gateway does not need to know the hopping pattern in advance; if the packet lies completely within the gateway’s processed bandwidth, it can be demodulated. In Europe, DR8/DR10 use 137 kHz operating channels and DR9/DR11 use 336 kHz operating channels, with 488 Hz occupied-bandwidth subcarriers. For the 137 kHz EU configuration, this yields 280 subcarriers, organized into 8 simultaneous grids of 35 usable subcarriers each because regulation requires a minimum separation of 3.9 kHz between hopping carriers.

Packet structure consists of SyncWord, PHY Header, and Payload. The header is repeated 3 times in the more robust mode and 2 times in the faster mode. DR8/DR10 use coding rate 1/3, 3 header repetitions, and physical bit rate 162 bps; DR9/DR11 use coding rate 2/3, 2 header repetitions, and physical bit rate 325 bps. The header is 5 bytes long including CRC, transmitted as 80 bits because of a 1/2 convolutional code, with 0.233 s per replica. The payload is convolutionally coded and decoded by Viterbi decoding, so reception can succeed even when some fragments are lost. The packet hopping sequence is generated per packet from a 32-bit hash function over a device-specific 9-bit random number and fragment index, with the result mapped to the set of usable carriers.

The principal benefit is system-level capacity rather than per-device packet rate. Under a 1\% duty-cycle limit in Europe, the paper reports approximate end-device capacities of 369.1 to 873.5 packets/hour for LoRa DR5, 10.7 to 27.5 packets/hour for LR-FHSS DR8/10, 15.6 to 36.3 packets/hour for LoRa DR0, and 20.1 to 46.6 packets/hour for LR-FHSS DR9/11. At the network level, however, a 125 kHz LoRa channel saturates at about 50 supported end devices in the studied setting, whereas LR-FHSS supports many more simultaneous transmitters. For a 10-byte payload, maximum goodput occurs around 8,000 devices for DR9 and 18,000 devices for DR8, corresponding to about 370,000 packets/hour and 500,000 packets/hour, respectively. In the EU 868–870 MHz band, the paper estimates total network capacities of about 96,000 packets/hour for legacy LoRa DR0, about 3.5 million packets/hour for LR-FHSS DR8, and about 1.48 million packets/hour for LR-FHSS DR9, corresponding to about 36× and 15× capacity increases over LoRa DR0. This suggests that “fast” in this literature refers to fast hopping and high aggregate capacity rather than low per-device latency (Boquet et al., 2020).

7. Comparative interpretation

Across these literatures, FAST-LoRa denotes a family of acceleration-oriented designs rather than a single technique. The common pattern is the replacement of expensive default procedures by structure-aware surrogates or decompositions. In CKGE, the expensive default is full retraining or full-parameter fine-tuning, replaced by graph layering and incremental low-rank adapters. In neural-network LoRA execution, the expensive default is a fixed autograd decomposition, replaced by shape-aware selection among algebraically equivalent graphs. In LoRaWAN simulation, the expensive default is packet-level discrete-event evaluation, replaced by analytical models and matrix operations. In LoRa physical-layer aggregation and LR-FHSS, the expensive or limiting default is conventional collision-averse access, replaced by either gateway-side MPR or fast pseudo-random frequency hopping (Liu et al., 2024, Cherniuk et al., 2023, García et al., 31 Jul 2025, You et al., 2022, Boquet et al., 2020).

The same comparison also clarifies the boundaries of each usage. The CKGE FAST-LoRa is a parameter-efficient continual learning framework whose core metrics are MRR, Hits@1, Hits@3, Hits@10, and total training time. RunLoRA is an implementation framework for low-rank adaptation whose central concerns are FLOPs, activation memory, and forward-backward throughput. The LoRaWAN FAST-LoRa simulator is an optimization-oriented surrogate model whose target metrics are PDR, EE, and sampled RSS/SNR under assumptions such as single-channel, uplink-focused, and stable traffic. LoRaPDA is a gateway receiver architecture for coordinated simultaneous transmissions, and LR-FHSS is a new LoRaWAN uplink physical layer that trades per-device throughput for system-level capacity.

A common misconception is to treat these names as interchangeable. They are not. FAST-LoRa in CKGE and fast-LoRA in neural-network fine-tuning concern low-rank adaptation, whereas FAST-LoRa, LoRaPDA, and LR-FHSS concern Long Range radio systems. Another misconception is to interpret “fast” as meaning the same optimization target in every case. In these papers, “fast” may mean lower CKGE retraining cost, faster LoRA forward/backward execution, faster network-strategy evaluation, quicker aggregate collection, or higher-capacity fast-hopping uplink operation. The arXiv literature therefore uses FAST-LoRa as a context-dependent label whose technical meaning is determined by the surrounding field rather than by the string itself.