Exact Planar Emulators in Graph Theory

• Exact planar emulators are graph sparsifiers that preserve terminal distances exactly by enforcing either unrestricted or strict planarity constraints.
• They enable near-optimal metric compression in planar graphs through techniques like unit-Monge encoding, BFS-based decomposition, and critical-path analysis.
• Their design differentiates between models that allow nonplanar, directed weighted emulators and those that require the emulator itself to be planar, impacting size and complexity.

Searching arXiv for recent and foundational papers on exact planar emulators. Exact planar emulators arise in two distinct but related strands of graph theory. In the distance-preservation literature, an emulator is a smaller graph that contains a designated terminal set $T$ and preserves terminal distances exactly, meaning $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$ for all $s,t\in T$. Within that strand, one must distinguish between exact emulators for planar input graphs, where the emulator itself may be nonplanar, and exact planar emulators, where the emulator is also required to be planar. A separate, older literature uses “planar emulator” in a different sense: a locally-surjective homomorphism from a finite planar graph onto a target graph. The terminological overlap is substantial, but the models, objectives, and techniques are different (Chang et al., 2018).

1. Definitions and terminological scope

For a graph $G=(V,E)$ and a terminal set $T\subseteq V$, a distance emulator with respect to $T$ is another graph $H$ such that $T\subseteq V(H)$ and

$$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$

“Exact” means equality of terminal distances, with no additive error or multiplicative distortion. In the broader emulator formalism recalled in the recent planar-sparsification literature, a quality-$q$ emulator satisfies

$$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$0

and the exact case is $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$1 (Li et al., 13 Jul 2025).

The central ambiguity lies in the word “planar.” In the 2018 near-optimal compression result, planarity refers to the input graph class: $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$2 is undirected, unweighted, and planar, but the constructed emulator $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$3 is not required to be planar, a subgraph, or a minor. Indeed, the main theorem produces a directed weighted graph with auxiliary Steiner vertices. By contrast, the 2025 result studies exact planar emulators in the stronger sense that $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$4 itself must be an edge-weighted planar graph containing the terminals (Chang et al., 2018).

This distinction is not cosmetic. If one removes structural restrictions on $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$5, the complete graph on $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$6 with exact terminal distances on its edges is an immediate exact emulator. The difficulty in exact planar emulation is therefore not exactness alone, but exactness under a planarity constraint on the sparsifier. Conversely, if one insists on subgraph or minor structure, exact preservation can require substantially larger size. The modern literature therefore separates at least three models: unrestricted exact emulators for planar inputs, exact planar emulators, and exact preservers or minors (Li et al., 13 Jul 2025).

2. Exact emulators for planar input graphs without planarity of the emulator

A foundational result shows that every $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$7-vertex undirected unweighted planar graph with $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$8 terminals admits an exact distance emulator of size

$$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$9

constructible in

$s,t\in T$0

time, with all edge weights nonnegative integers bounded by $s,t\in T$1. Suppressing polylogarithmic factors, this is $s,t\in T$2, and the emulator is a directed weighted graph rather than a planar object (Chang et al., 2018).

The preserved quantity is strictly terminal-metric information. The construction guarantees all-pairs distances among terminals and nothing stronger: it does not preserve nonterminal-to-nonterminal distances, all-pairs distances over all vertices, shortest paths themselves, path reconstruction, flow or cut structure, minor structure, or a planar embedding. The use of Steiner vertices and weighted directed edges is an essential compression mechanism rather than an incidental artifact.

A key algorithmic consequence concerns terminal APSP. By constructing the emulator and then running Dijkstra from each terminal in the emulator, all pairwise terminal distances can be computed in

$s,t\in T$3

time. In particular, this becomes near-linear when $s,t\in T$4. The broader methodological message is a reduction paradigm: replace the planar graph by an exact emulator and then apply standard distance algorithms to the compressed graph.

Near-optimality is established relative to earlier encoding results. Abboud, Gawrychowski, Mozes, and Weimann had shown that terminal distances in unweighted planar graphs admit an encoding of size $s,t\in T$5 bits, optimal up to logarithmic factors, but that encoding was not itself a graph. The emulator result matches that asymptotic compression with an actual graph object. At the same time, the theorem is sharply scoped: weighted planar graphs, directed planar graphs, and nonplanar graphs are outside its guarantees, and exact subquadratic compression is impossible in general for weighted planar graphs.

3. Exact planar emulators under a planarity constraint

A later result studies the stronger sparsification problem in which the emulator must itself be planar. Let $s,t\in T$6 be an edge-weighted planar graph, and let $s,t\in T$7 be a set of $s,t\in T$8 terminals such that all terminals lie on the boundaries of $s,t\in T$9 faces in a fixed planar embedding. Then there exists another edge-weighted planar graph $G=(V,E)$0 with $G=(V,E)$1 and

$G=(V,E)$2

such that

$G=(V,E)$3

This gives a clean interpolation between the one-face regime, where the bound becomes $G=(V,E)$4, and the unrestricted worst case $G=(V,E)$5, where it becomes $G=(V,E)$6 (Li et al., 13 Jul 2025).

The embedding is intrinsic to the theorem. The parameter $G=(V,E)$7 refers to actual faces in the planar embedding, and the construction preserves the cyclic order of terminals around those faces. A preprocessing stage simplifies the instance so that each relevant face boundary is a simple cycle containing only terminals, the face cycles are vertex-disjoint, and shortest-path intersections have a clean topological form. After perturbation enforcing uniqueness of shortest paths and repeated uncrossing, any two terminal shortest paths are either vertex-disjoint or intersect at a single internal vertex where they cross transversally.

The construction has two layers. For each terminal face $G=(V,E)$8 with terminal set $G=(V,E)$9, an existing exact one-face emulator $T\subseteq V$0 of size $T\subseteq V$1 is inserted. The new ingredient is a central planar graph $T\subseteq V$2 that handles distances between terminals on different faces and is required not to underestimate same-face distances. Formally, $T\subseteq V$3 satisfies exactness for inter-face terminal pairs and a lower-bound inequality for same-face pairs. The final emulator is obtained by gluing each one-face gadget $T\subseteq V$4 into the corresponding face of $T\subseteq V$5, identifying the terminal copies.

The combinatorial source of the $T\subseteq V$6 bound is a system of critical shortest paths. For a fixed terminal $T\subseteq V$7, shortest paths from $T\subseteq V$8 to another face are partitioned into equivalence classes according to whether moving between consecutive target terminals sweeps any terminal face. A shortest path is critical precisely when it is not equivalent to either cyclic neighbor. The core lemma states that each terminal has only $T\subseteq V$9 critical paths; the proof yields the explicit bound at most $T$0. Summed over all terminals, this gives $T$1 critical paths, and since every pair of critical paths intersects at most once, the number of nonterminal crossing vertices in the skeleton is $T$2.

4. Technical mechanisms

The near-optimal emulator for planar input graphs is driven by a planar-metric compression framework coupled with a new graphical encoding of unit-Monge matrices. Distances among vertices appearing in order on one or two face boundaries satisfy Monge-type inequalities, and in the unweighted setting the relevant matrices are unit-Monge, with

$T$3

A central lemma states that an $T$4 unit-Monge or triangular unit-Monge matrix can be represented by a directed edge-weighted graph with $T$5 vertices and edges, constructible in $T$6 time, so that the graph distance from row vertex $T$7 to column vertex $T$8 is exactly $T$9. This is obtained via a right-substochastic reduction

$H$0

followed by a recursive emulator for the associated dominance-counting structure. The planar graph is then decomposed into slices and regions using BFS levels in the radial graph, Jordan cycle separators, and a heavy-hole modification that yields the stated near-linear construction time (Chang et al., 2018).

The exact planar-emulator construction is organized around a different principle: graphs are analyzed through distinguished shortest paths and, crucially, through how those paths intersect. Critical paths come in paired form, one designated primary and the other secondary according to the relative indices of the source and target faces. Inter-face terminal pairs are connected by canonical paths, each formed as a concatenation of two primary-path prefixes meeting at a bend. The obstacle is not merely counting such paths, but forcing their crossing pattern to match the crossing pattern of true shortest paths in the original graph.

To repair topological inconsistencies, the construction maintains a central graph $H$1 and repeatedly removes canonical bad pairs. A bad pair consists of a critical path and a safe $H$2-bend path that cross more than once. The algorithm finds a canonical bad pair, refines it to a minimal bad pair by shrinking a triangle obstruction, and reroutes the offending critical path along the top of that triangle. The local analysis shows that the number of bad pairs strictly decreases, so the process terminates. The result is a central skeleton in which canonical paths cross if and only if the corresponding shortest paths in the input graph cross (Li et al., 13 Jul 2025).

Edge weights in the planar skeleton are not assigned by an explicit closed formula. Instead, feasibility is proved for a linear system with one nonnegative variable $H$3 per edge, lower-bounding all simple terminal-terminal path lengths by the corresponding distances in $H$4 and upper-bounding all canonical path lengths by those same distances. Using Farkas’ lemma, infeasibility would produce a pair of terminal flows $H$5 with $H$6 supported on canonical paths, $H$7 dominating $H$8 edgewise, and $H$9. The contradiction is obtained by transferring $T\subseteq V(H)$0 back to shortest paths in $T\subseteq V(H)$1, then showing that $T\subseteq V(H)$2 can also be realized in $T\subseteq V(H)$3 under domination by the transferred canonical flow. The proof uses graph splitting, an interval-partition argument, morphing areas, and Wye–Delta / Delta–Wye transformations as local flow-equivalence operations.

5. Lower bounds, limitations, and common misconceptions

A persistent misconception is that the 2018 theorem constructs a planar emulator. It does not. The planar structure is entirely in the input geometry and in the algebraic regularities of boundary-distance matrices; the final emulator may be directed, weighted, nonplanar, and unrelated to the input by subgraph or minor containment. This permissiveness is the reason a $T\subseteq V(H)$4 bound is achievable in the unweighted planar setting (Chang et al., 2018).

The contrast with stronger structural models is sharp. If one insists that an exact emulator be a minor of the planar input, exact preservation may require $T\subseteq V(H)$5 size even for unweighted planar grids. For weighted planar graphs, arbitrary $T\subseteq V(H)$6 binary matrices can be encoded in subset distances among $T\subseteq V(H)$7 vertices, implying an $T\subseteq V(H)$8 lower bound even for unrestricted exact emulators. These statements isolate the unweighted undirected planar case as the exceptional regime in which subquadratic exact compression is possible.

In the planar-sparsifier model, the best known general upper bound is $T\subseteq V(H)$9, while the only recalled lower bound is $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$0, already tight in the one-face case. No $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$1-dependent lower bound is established, and the motivating open question remains whether every planar graph with $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$2 terminals has an exact planar emulator of size $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$3. Thus the interpolation theorem is substantial progress but not an optimality theorem (Li et al., 13 Jul 2025).

The two recent strands also differ in algorithmic explicitness. The near-optimal emulator for planar inputs comes with a stated construction time $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$4. By contrast, the exact planar-emulator paper gives a constructive finite procedure—preprocessing, critical-path skeleton construction, iterative rerouting, an LP, and an LP-feasibility proof—but does not state a polished asymptotic running-time theorem for the full construction. Finally, neither approach preserves path-reporting or broader graph structure by default; the guarantees are about terminal distances.

6. Relation to the older notion of planar emulators

Before the distance-sparsification literature adopted emulator terminology, graph theorists used “planar emulator” to mean something different: a finite planar graph $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$5 equipped with a graph homomorphism $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$6 such that for every $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$7, the neighborhood map is surjective onto the neighborhood of $$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$8,

$$\operatorname{dist}_H(u,v)=\operatorname{dist}_G(u,v)\qquad \forall u,v\in T.$$9

This is a locally-surjective homomorphism model, not a terminal-distance-preserving sparsifier. A planar cover is the stronger case in which the local map is bijective rather than surjective (Chimani et al., 2011).

That older literature is important chiefly because it explains why the phrase “planar emulator” can be misleading outside distance-preservation contexts. It established that planar-emulability in the homomorphic sense is strictly broader than planar-coverability and not characterized by projective-plane embeddability. Explicit planar emulators were given for $q$0, $q$1, $q$2, $q$3, $q$4, $q$5, $q$6, $q$7, $q$8, $q$9, and $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$00. The class was shown to be minor-closed and closed under $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$01-transformations, while graphs containing two disjoint $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$02-graphs and the graph $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$03 were shown not to admit planar emulators in that sense.

Conceptually, the homomorphic notion and the exact distance-preserving notion address different invariants. The former asks whether adjacency can be represented through a locally-surjective planar lift; the latter asks whether a specified terminal metric can be represented exactly by a smaller graph. The recent exact planar-emulator literature therefore should not be read as a continuation of the planar-emulable-graph program, even though both inherit the same word “emulator.”

7. Position within planar distance sparsification

The modern theory of exact planar emulators sits at the intersection of terminal sparsification, planar shortest-path structure, and metric compression. One branch shows that if planarity is imposed only on the input, exact terminal metrics in undirected unweighted planar graphs can be compressed to near-optimal size $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$04 by allowing the emulator to be a general directed weighted graph. The other branch shows that if the emulator itself must be planar, then exact preservation is still possible with size $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$05 when the terminals lie on $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$06 faces (Chang et al., 2018).

The two branches are complementary rather than competing. The first gives stronger compression and a cleaner algorithmic reduction interface, but only because it abandons any planarity requirement on the emulator. The second retains planarity of the sparsifier and thereby addresses a structurally stricter problem, at the cost of larger known bounds and a more topological construction. Their technical cores are correspondingly different: unit-Monge matrix emulation and planar decomposition on one side, critical-path systems, bad-pair elimination, and LP duality through flows on the other (Li et al., 13 Jul 2025).

Taken together, these results suggest that exact terminal distance preservation in planar graphs is governed by two intertwined principles. The first is algebraic regularity of boundary-distance matrices, which supports strong compression when the output graph is unrestricted. The second is topological control of shortest-path systems and their intersection order, which becomes decisive when the output graph must remain planar. The unresolved frontier is whether these viewpoints can be fused tightly enough to obtain $$\operatorname{dist}_H(s,t)=\operatorname{dist}_G(s,t)$$07-size exact planar emulators for arbitrary terminal placements.