Estimation-Based SpGEMM Workflow
- Estimation-based SpGEMM workflow is a family of techniques that predict sparse matrix product structures to optimize memory allocation and execution scheduling.
- It leverages lightweight predictors—such as sampled compression ratios, work estimates, and HLL sketches—to accurately forecast nonzero distributions and guide algorithm dispatch.
- By integrating estimation into memory pre-allocation and kernel selection, these workflows enhance performance across diverse architectures including CPUs, GPUs, vector, and accelerator-based systems.
Searching arXiv for relevant papers on estimation-based SpGEMM workflows and related algorithm-selection work. Estimation-based SpGEMM workflow denotes a family of sparse general matrix multiplication procedures in which structural properties of the product matrix are predicted or estimated before, or in lieu of, exact symbolic computation. In sparse matrix multiplication , the principal target of estimation is typically the output structure of , especially the number of nonzeros per row or per column, because memory allocation, load balancing, and accumulator selection depend on it. Across CPU, GPU, vector, and accelerator settings, the workflow replaces or supplements exact symbolic phases with lightweight predictors derived from intermediate-product counts, sampled compression ratios, HyperLogLog sketches, or work metrics such as per-column operation counts. The approach is motivated by the cost of exact symbolic traversal and by the fact that SpGEMM performance is strongly conditioned on irregular sparsity, accumulator pressure, and communication patterns (Du et al., 2022, Li et al., 21 Apr 2026, Liu et al., 2015, Fèvre et al., 2023, Ballard et al., 2016, Yadav et al., 2024).
1. Definition and motivating problem
Sparse general matrix multiplication (SpGEMM) computes for sparse matrices and is a fundamental building block in scientific computing, graph analytics, and machine learning (Du et al., 2022, Fèvre et al., 2023, Li et al., 21 Apr 2026, Liu et al., 2015). A central difficulty is that the output sparsity pattern is unknown a priori. In CSR-based row-wise formulations, the critical quantity is the number of nonzeros per output row of ; in CSC-based column-wise vector formulations, the analogous quantity is the work or structural complexity per output column (Du et al., 2022, Fèvre et al., 2023).
The motivation for estimation is operational rather than merely analytical. Accurate prediction enables memory allocation for CSR row pointers and per-row buffers, load balancing across CPU threads or GPU warps and CTAs, and kernel selection among hash-based, merge-based, sorting-based, dense, or hybrid accumulators (Du et al., 2022, Li et al., 21 Apr 2026). In vector architectures, work estimation supports dynamic switching among SPA, SPARS, and HASH, while in communication-centric settings it guides the selection of 1D, 2D, or 3D algorithm families (Fèvre et al., 2023, Ballard et al., 2016). In accelerator-oriented dataflow selection, estimation extends beyond output size to operational and traffic surrogates that distinguish inner-product, outer-product, and row-wise dataflows (Yadav et al., 2024).
The immediate alternative to estimation is exact symbolic computation. Exact symbolic methods determine the output structure precisely but often perform a traversal similar in complexity to the numeric phase, thereby adding substantial overhead when used strictly for sizing or scheduling (Du et al., 2022). On GPUs, the symbolic pass alone accounts for roughly of total runtime on average in state-of-the-art baselines such as spECK, even though it produces only one number per row (Li et al., 21 Apr 2026). Upper bounds based on intermediate products are cheap, but can be extremely loose, particularly when the compression ratio is high (Du et al., 2022). Estimation-based workflows occupy the design space between these two extremes.
2. Structural quantities and estimator targets
The quantities estimated in SpGEMM workflows vary by execution model, but they all describe latent structure or work in the product.
For row-wise CSR SpGEMM, let , , and . The row-wise dataflow forms
A fundamental quantity is the row-level intermediate-product count
with total
0
The corresponding output compression ratio is
1
These definitions underpin sampled compression-ratio estimation on CPUs and upper-bound workflows on GPUs (Du et al., 2022, Liu et al., 2015, Li et al., 21 Apr 2026).
In the GPU formulation of Ocean, the structural target for row 2 is
3
the number of distinct column indices reachable by two-hop expansion through the nonzeros of row 4 of 5 into rows of 6 (Li et al., 21 Apr 2026). This is precisely the quantity needed for per-row capacity and bin assignment in Gustavson-style numeric kernels.
In the vector-architecture workflow using CSC storage, the principal estimator is per-column work:
7
where 8 is the number of nonzeros in column 9 of 0 (Fèvre et al., 2023). Here the estimation target is not directly 1 but the intermediate-product count governing whether SPA, SPARS, or HASH is preferable.
The 2015 GPU framework uses
2
which serves simultaneously as a work estimate and an upper bound on 3 via 4 (Liu et al., 2015). This bound is structurally loose but easy to compute in 5 time.
A broader implication is that estimation-based workflows can be organized around three estimator families: direct size prediction, work prediction, and communication prediction. That taxonomy is not stated explicitly in the sources, but it is consistent with the sampled-6 method (Du et al., 2022), the 7 vector work model (Fèvre et al., 2023), and the hypergraph communication framework (Ballard et al., 2016).
3. Ratio-based estimation of output structure
A prominent estimation-based workflow is the sampled compression-ratio method for CSR SpGEMM proposed in "Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio" (Du et al., 2022). Its central idea is to estimate 8 from a sampled result computed on a small uniform random subset of rows of 9, while keeping all rows of 0 visible. For a sampled row set 1,
2
and the sample-based compression-ratio estimator is
3
Predicted row lengths then follow as
4
with total prediction
5
The workflow computes 6 by precomputing the row degrees 7 and summing them over the nonzeros in each row of 8 (Du et al., 2022).
The distinguishing argument is error neutralization. If the sampled FLOP and sampled nonzero counts are perturbed by relative errors 9 and 0, then the induced relative error in the estimated total is
1
When 2, the estimator error becomes small. The paper reports a positive correlation between sampled FLOP and sampled nnz with correlation coefficient 3 across 4 test cases, which supports the ratio-based design (Du et al., 2022).
The sampling strategy uses a small, uniform random subset of rows of 5 with
6
and computes 7 exactly on the sample using a per-row hash-based accumulator with linear probing (Du et al., 2022). Because both matrices are typically in CSR, row sampling is preferred over column sampling, and row-wise dataflow is described as faster and simpler than inner-product dataflow for CSR inputs (Du et al., 2022).
The empirical results are specific. On 8 test cases derived from 9 representative SuiteSparse matrices, the absolute relative error of the proposed method is 0 on average and 1 in the worst case, versus 2 average and 3 worst-case for a reference sampling design that scales sampled nnz only and ignores sampled FLOP (Du et al., 2022). The parallel implementation adds on average 4 of execution time relative to BRMerge-Precise; on matrix-square benchmarks, computing 5 costs 6 on average, up to 7, and the prediction step costs 8 on average, up to 9 (Du et al., 2022).
The workflow then integrates prediction into downstream execution. It allocates CSR with
0
where 1 is a small guard factor such as 2–3, and uses predicted row sizes to choose hash-based, merge-based, or sorting-based accumulation and to distribute rows proportionally to 4 or 5 (Du et al., 2022).
4. Upper-bound and hybrid pre-allocation workflows
An earlier and influential GPU framework estimates structure using per-row work bounds rather than direct output-size prediction (Liu et al., 2015). In "A Framework for General Sparse Matrix-Matrix Multiplication on GPUs and Heterogeneous Processors" (Liu et al., 2015), all stages use CSR, and the symbolic estimation phase computes 6 on the GPU with one thread per output row. Because 7 depends only on row lengths read from 8’s row pointers, the estimation cost is 9 (Liu et al., 2015).
The framework then performs host-side binning into 0 bins organized into five groups:
| Bin group | Range of 1 | Allocation policy |
|---|---|---|
| 1 | 2 | Empty rows |
| 2 | 3 | Single-entry rows |
| 3 | 4 | Exact-size upper bound per row |
| 4 | 5 | Exact-size upper bound per row |
| 5 | 6 | Initial capacity 7, then progressive growth |
For bin groups 8–9, the temporary CSR matrix 0 allocates 1. For bin group 2, capacity is initialized to 3 and grown by doubling when needed (Liu et al., 2015). This is described as a hybrid strategy interpolating between upper-bound allocation and progressive allocation. The rationale is explicit: full upper-bound allocation at the intermediate size 4 can exceed device memory by orders of magnitude on irregular matrices, whereas precise pre-computation doubles the work and time (Liu et al., 2015).
The estimator is integral to algorithm dispatch. Rows with 5 use a heap-based shared-memory accumulator. Rows with 6 use bitonic ESC (Expansion–Sorting–Compression). Rows with 7 use merge-based insertion with GPU merge path, with checkpointing, dumping to global memory, re-allocation by 8, and reload for long rows (Liu et al., 2015). Load balancing follows the same estimate: short rows use one thread per row, moderate and long rows use one thread group per row, and per-bin counters avoid launching empty kernels (Liu et al., 2015).
This workflow does not estimate 9 tightly. Instead, it treats arithmetic work as a safe upper bound and uses bin-specific accumulation strategies to absorb overestimation. A plausible implication is that it belongs to the same estimation-based lineage as later ratio-based and HLL-based methods, but emphasizes robust scheduling and memory control over prediction accuracy. That interpretation is consistent with the later critique that upper bounds can be “extremely loose” when compression ratios are large (Du et al., 2022).
The framework also includes a heterogeneous-processor variant using re-allocatable shared virtual memory on APUs. For matrices that need re-allocation, this yields average 0 and up to 1 speedup on AMD A10-7850K by enabling in-place growth and shrink without copy (Liu et al., 2015).
5. Sketch-based estimation and workflow selection on GPUs
The GPU system Ocean introduces a more elaborate estimation-based symbolic workflow that replaces most exact symbolic accumulation with HyperLogLog (HLL) sketches (Li et al., 21 Apr 2026). Ocean constructs one HLL sketch per row of 2, using 3 registers with 4 bits per register. It uses 5 adaptively: 6 for 7 when the input expansion ratio 8, otherwise 9 for 00 (Li et al., 21 Apr 2026).
For each row 01 of 02, Ocean merges the sketches of the rows of 03 referenced by 04 using elementwise maxima and estimates the union cardinality with the standard raw HLL estimator
05
where 06 (Li et al., 21 Apr 2026). Linear counting is used when 07, and large-range corrections are enabled when 08 (Li et al., 21 Apr 2026).
Ocean embeds HLL into a matrix-level workflow selector driven by two ratios. The input expansion ratio is
09
and the output compression ratio is
10
Ocean estimates 11 cheaply via sampling: it builds HLL sketches for all rows of 12 and randomly samples 13 of rows of 14, with minimum 15 and maximum 16, to merge their sketches and estimate approximate 17 values (Li et al., 21 Apr 2026).
The workflow then chooses among three modes:
| Workflow | Selection criterion |
|---|---|
| Upper-bound estimation | Average intermediate products per row 18 |
| HLL estimation | Average intermediate products per row 19, 20, and sampled 21 |
| Exact symbolic | Otherwise |
The rationale is architectural. Each HLL register is a byte, each CSR column index is 22 bytes, and 23 makes merging 24 registers per referenced row about as cheap as reading approximately 25 symbolic indices (Li et al., 21 Apr 2026). Likewise, 26 is used because estimation-based workflows delay the final CSR layout, and late compaction overhead grows when compression is low (Li et al., 21 Apr 2026).
Ocean treats estimator uncertainty through allocation slack. Per-row capacity is
27
with default 28, and 29 may be raised to 30 when 31 (Li et al., 21 Apr 2026). The relative standard error of HLL is approximated by 32, yielding about 33 for 34 and 35 for 36 (Li et al., 21 Apr 2026). Measured average relative per-row errors are about 37, 38, and 39 for 40, with overflow rates after binning with 41 expansion and upward rounding of 42, 43, and less than 44, respectively (Li et al., 21 Apr 2026).
The numeric phase uses the estimator to guide accumulator choice. Ocean provides hash-based accumulators with hybrid memory, dense accumulators, and ESC accumulators, each with multiple bins (Li et al., 21 Apr 2026). Dense is preferred over hash when both fit the same bin, except in the largest bin where hybrid hash is favored; ESC is used only in the upper-bound workflow (Li et al., 21 Apr 2026). Overflow rows are handled by a fallback kernel using the largest dense accumulator configuration and a global buffer sized by the row’s intermediate product count (Li et al., 21 Apr 2026).
The performance data are end-to-end. On 45 square matrices and 46 rectangular matrices from SuiteSparse, Ocean achieves on A100 a geometric mean of 47 GFLOP/s for square cases and 48 GFLOP/s for rectangular cases, and on H100 49 GFLOP/s for square cases (Li et al., 21 Apr 2026). It wins on 50 square matrices on A100 and 51 on H100, with average speedups of 52–53 over leading GPU baselines across the study; more specifically, on A100 square matrices the average speedups over cuSPARSE, spECK, opSparse, TileSpGEMM, and HSMU are 54, 55, 56, 57, and 58, respectively (Li et al., 21 Apr 2026). The estimation step costs approximately 59 of runtime for selected matrices, compared with symbolic-step costs of about 60–61 in spECK or the baseline Ocean variant (Li et al., 21 Apr 2026).
6. Estimation for kernel, dataflow, and communication selection
Estimation-based SpGEMM workflows are not confined to output-size prediction. In several settings, the estimated quantity is used to select among algorithmic dataflows, accumulator families, or communication decompositions.
On RISC-V vector architectures, the workflow in "Optimization of SpGEMM with Risc-V vector instructions" (Fèvre et al., 2023) computes 62 for every output column and sorts columns by decreasing work. This work estimate drives dynamic switching between SPA, SPARS, and HASH, yielding hybrid algorithms H-SPA63 and H-HASH64 governed by a threshold 65 (Fèvre et al., 2023). If 66, the system uses SPARS or HASH inside blocks formed to homogenize column work; otherwise it uses SPA (Fèvre et al., 2023). The threshold guidance comes from sensitivity experiments: 67 in 68 yields the best average, and 69 is used in the main evaluation (Fèvre et al., 2023). H-SPA70 and H-HASH71 obtain average speedups of 72 and 73 over SPA on 74 SuiteSparse matrices, and 75 and 76 on the 77 most sparse matrices (Fèvre et al., 2023).
In Misam, estimation is fused with machine learning for dataflow selection among inner-product, outer-product, and row-wise SpGEMM (Yadav et al., 2024). The system extracts light-weight structural features such as sparsityA, sparsityB, avg_row_lengthA, avg_row_lengthA_var, avg_col_lengthB, and blocks_accessed, then predicts the best dataflow per block using a decision tree or DQN (Yadav et al., 2024). The decision tree, limited to depth 78, achieves 79 selection accuracy; the DQN achieves 80 (Yadav et al., 2024). Relative to any single fixed dataflow, the decision tree produces average speedups of 81 over IP, 82 over OP, and 83 over RW, with 84 improvement over the heuristic baseline (Yadav et al., 2024). The abstract reports gains of up to 85 times (Yadav et al., 2024). Although Misam frames the problem as dataflow choice rather than symbolic estimation, it exemplifies the same principle: low-cost structural surrogates are used to avoid committing to a single static execution strategy.
At a larger scale, the hypergraph framework for SpGEMM estimates communication and memory-hierarchy traffic from sparsity patterns (Ballard et al., 2016). The fine-grained model associates computation vertices with nontrivial products and data vertices with nonzeros of 86, 87, and 88, then encodes dependencies as hyperedges (Ballard et al., 2016). Estimation in this setting concerns communication volume along the critical path, total connectivity, and sequential I/O lower bounds. The workflow computes sparsity features, estimates flops 89, constructs coarse 1D or 2D hypergraph models, partitions or approximates them, and selects the algorithm family minimizing predicted communication subject to load balance (Ballard et al., 2016). The paper’s empirical conclusion is that at least one coarse-grained model is as communication efficient as the fine-grained model in each of the three application domains studied, but different applications favor different families (Ballard et al., 2016).
Taken together, these works suggest that “estimation-based SpGEMM workflow” is best understood as a general control architecture: estimate a structural proxy, map it to a resource or algorithm decision, then execute the numeric phase under that guidance. The proxy may be 90, 91, 92, feature vectors for ML classifiers, or hypergraph cuts.
7. Accuracy limits, guardrails, and open directions
The principal limitation of estimation-based workflows is that their reliability depends on how well the estimator captures overlap and skew in the product structure. In the sampled compression-ratio method, when the correlation between sampled FLOP and sampled nnz weakens, error neutralization diminishes; the observed worst-case error reaches 93 in extreme cases (Du et al., 2022). The paper identifies rows with extreme degree skew and duplicate aggregation patterns as contributors to residual error, and suggests adaptive sampling, importance sampling proportional to 94, and per-cluster compression-ratio estimation as future directions (Du et al., 2022).
Ocean incorporates explicit guardrails for such uncertainty (Li et al., 21 Apr 2026). It uses slack factors, upward bin rounding, and a robust overflow kernel. Under-estimation is therefore treated as a performance issue rather than a correctness issue: overflow rows are rerun with safe upper-bound capacity, while over-estimation increases compaction cost modestly but does not violate CSR correctness (Li et al., 21 Apr 2026). This suggests a design principle common to modern workflows: approximate sizing is acceptable when backed by bounded fallback mechanisms.
Upper-bound workflows have the opposite problem. They are safe but can over-allocate severely when the compression ratio is large, consuming memory and skewing binning or scheduling (Du et al., 2022, Liu et al., 2015). Ocean formalizes part of this trade-off with 95 and 96 thresholds, choosing exact symbolic whenever late compaction would not amortize or when HLL merging would not be traffic-efficient (Li et al., 21 Apr 2026).
Work-estimation workflows for vector architectures face different failure modes. The synthetic cross-overs reported for SPA versus SPARS and HASH depend on assumptions about uniform sparsity and sorted column degrees, and the paper notes that the general case deviates depending on column nnz distributions (Fèvre et al., 2023). Hence, 97 is a useful but not exhaustive predictor. Sorting and blocking reduce imbalance but do not eliminate it (Fèvre et al., 2023).
ML-based selectors such as Misam face hardware dependence and distribution shift (Yadav et al., 2024). The learned efficiencies and feature-action mappings are tied to buffer sizes, interconnect, and PE scheduling, so retraining per accelerator configuration is advisable (Yadav et al., 2024). That caveat is consistent with the broader literature: estimated structure is platform-agnostic only at a coarse level, while thresholding, accumulator choice, and occupancy interactions are platform-specific.
Several future directions recur across the sources. These include adaptive or stratified sampling for nonuniform compression ratios (Du et al., 2022); alternative sketches with lower relative standard error at equal bandwidth, hierarchical sketches, and better memory-footprint modeling for multi-GPU settings (Li et al., 21 Apr 2026); predictive models for kernel efficiency beyond shared-memory capacity on vector hardware (Fèvre et al., 2023); and tighter theoretical error bounds or uncertainty-aware fallbacks that bridge statistical estimation and resource provisioning (Du et al., 2022, Li et al., 21 Apr 2026). A plausible implication is that future estimation-based SpGEMM systems will combine multiple estimators—sampling, sketches, analytical bounds, and learned predictors—inside a unified controller rather than relying on a single proxy.
In aggregate, the literature defines an estimation-based SpGEMM workflow as a multistage procedure in which symbolic exactness is selectively replaced by predictive structure analysis, with the resulting estimates steering memory layout, load balancing, accumulator design, kernel dispatch, dataflow selection, and, in distributed settings, communication decomposition. The technical diversity of these workflows reflects the fact that the unknown output structure of sparse matrix products is not merely a combinatorial nuisance; it is the principal control variable of high-performance SpGEMM.