EfficientNetV2 Architecture

• EfficientNetV2 is a convolutional neural network architecture featuring fused-MBConv blocks and training-aware NAS for improved efficiency.
• It integrates non-uniform scaling and adaptive progressive learning to enhance training speed while reducing parameter count.
• Empirical results show superior performance on ImageNet and transfer learning tasks with reduced inference latency.

EfficientNetV2 is a convolutional neural network architecture designed for high parameter efficiency and rapid training convergence. It introduces an optimized search and scaling methodology, novel convolutional operations, and an adaptive training protocol, achieving superior accuracy and training speed on both large-scale and transfer learning benchmarks relative to previous deep learning models.

1. Architectural Innovations

EfficientNetV2’s architecture consists of sequential “stages,” each comprising specific convolutional blocks identified via a training-aware neural architecture search (NAS). The primary components are:

• MBConv Blocks: Depthwise separable convolutions with expansion, identical to those in EfficientNetV1.
• Fused-MBConv Blocks: Newly introduced for EfficientNetV2, these combine the depthwise convolution and subsequent expansion 1×1 convolution from MBConv into a single standard 3×3 convolution. This modification significantly improves computational throughput on modern accelerators, particularly in early network stages.

Three notable refinements distinguish EfficientNetV2 from its predecessors:

• The systematic replacement of MBConv with Fused-MBConv blocks in initial layers, mitigating latency associated with depthwise operations.
• Preference for smaller expansion ratios and the sustained use of 3×3 kernels, with additional layers in later stages to compensate for receptive field reduction and increase representational capability.
• Removal of the final stride-1 stage, which lowers parameter count and memory consumption.

These changes yield an architecture that is smaller and faster, optimizing for low FLOPs and minimal parameter redundancy.

2. Training-Aware Neural Architecture Search

EfficientNetV2 employs NAS not only to maximize post-training accuracy, but also to jointly optimize for training speed and parameter efficiency. The search space is segmented by operation types (MBConv vs. Fused-MBConv), kernel sizes, expansion ratios, and layer counts per stage, all guided by a reward function:

$\text{Reward} = A \cdot S^w \cdot P^v$

with $w = -0.07$, $v = -0.05$, where $A$ is accuracy, $S$ is normalized step time, and $P$ is parameter count. This formula ensures selection of architectures that are computationally streamlined and have a favorable accuracy-to-complexity ratio.

Random search or reinforcement learning operates over a constrained pool of candidates (≈1000 architectures), facilitating efficient discovery of optimal configurations.

3. Non-Uniform Scaling and Fused Operations

EfficientNetV2 improves the classic compound scaling paradigm. While depth ($d$), width ($w$), and resolution ($r$) are scaled by powers of α, β, and γ (with $d = \alpha^\phi$, $w = \beta^\phi$, $r = \gamma^\phi$ subject to $$\alpha \cdot \beta^2 \cdot \gamma^2 \approx \text{constant}$$), EfficientNetV2 introduces:

• Fused-MBConv Placement: Fused blocks are restricted to early stages, determined during NAS, taking advantage of hardware optimization.
• Non-Uniform Layer Distribution: Instead of uniform upscaling, later stages receive more layers, reflecting where additional capacity most benefits representation.
• Inference Size Restriction: Maximum image size is capped (e.g., 480×480) to avoid memory bottlenecks, a constraint directly incorporated into scaling optimization.

This granularity ensures that resource allocation closely matches empirical training and inference bottlenecks.

4. Adaptive Progressive Learning

EfficientNetV2 formalizes a progressive learning protocol where image size and regularization (dropout, data augmentation magnitude) are incrementally increased across $M$ training stages:

$S_i = S_0 + (S_e - S_0) \cdot \frac{i}{M-1}$

$$\phi_i^k = \phi_0^k + (\phi_e^k - \phi_0^k) \cdot \frac{i}{M-1}$$

with $S_0$, $S_e$ as initial/target image sizes and $\phi_0^k$, $\phi_e^k$ as magnitudes for regularization type $k$. Each stage performs $N/M$ training steps, inheriting weights from the preceding stage.

Empirical results demonstrate that aggressive regularization during small image training impairs learning. The proposed schedule yields increased convergence rates and mitigates final accuracy losses associated with naive progressive resizing.

5. Empirical Performance Analysis

EfficientNetV2 achieves state-of-the-art scores on multiple datasets:

Model Variant	Parameter Ratio	ImageNet Top-1 (%)	Pretrained (ImageNet21k) Top-1 (%)	Speedup over ViT
EfficientNetV2-L	up to 6.8× smaller	85.7	87.3	5×–11×

Additional metrics reported include:

• Inference latency up to 3× faster than EfficientNetV1 on comparable hardware.
• Consistent superiority on transfer learning tasks: on CIFAR-100, up to 1.5% higher accuracy compared to prior ConvNets and Vision Transformers.

6. Practical Deployment Considerations

EfficientNetV2’s efficient design facilitates real-world integration on diverse platforms:

• Training Speed: Progressive learning and NAS-driven block selection enable completion of large-scale pretraining (e.g., ImageNet21k) within days using 32 TPU cores.
• Parameter Efficiency: Substantially reduced parameter footprints favor deployment on mobile and edge devices.
• Inference Performance: Faster convolutional blocks (especially Fused-MBConv) deliver reduced inference latencies, crucial for real-time applications.
• Hyperparameter Tuning: Adaptive regularization and progressive image sizing necessitate additional hyperparameter selection, slightly increasing implementation complexity but remaining compatible with established training pipelines.

7. Context and Significance

EfficientNetV2 represents a comprehensive improvement in convolutional network design for image recognition, integrating architectural, algorithmic, and training protocol advances. Its application spans high-throughput classification, transfer learning, resource-limited deployments, and rapid prototyping, with empirical results substantiating both efficiency and accuracy claims (Tan et al., 2021).

By formalizing block selection via training-aware NAS and optimizing scaling non-uniformly, EfficientNetV2 sets a benchmark for parameter-efficient, fast-converging image models, and forms a template for subsequent architecture and curriculum learning research.