CHDL: Chip Dicing Lane Dataset Benchmark

• CHDL is a public temporal dataset capturing the dynamic evolution of wafer dicing lanes using sequential grayscale images.
• It was acquired with an industrial-grade vision system under real manufacturing conditions, ensuring high-fidelity and process-relevant data.
• The dataset supports sequence-to-sequence forecasting for process modeling, defect detection, and digital twin creation using rigorous evaluation metrics.

Searching arXiv for the CHDL paper and closely related wafer dicing defect work. The Chip Dicing Lane Dataset (CHDL) is a public temporal image dataset for semiconductor wafer dicing, introduced as the first public benchmark dedicated specifically to the wafer dicing process. It captures the dynamic morphological evolution of the dicing lane as a wafer is translated through a high-precision dicing machine, and is designed for spatio-temporal prediction in a real manufacturing environment rather than for static-image inspection alone. In the associated study, CHDL is positioned as a benchmark for high-fidelity process modeling, micro-defect detection, and digital twin development in semiconductor manufacturing (Xie et al., 9 Jul 2025).

1. Definition and domain scope

CHDL belongs to the domain of semiconductor wafer dicing and focuses specifically on the dicing lane region during processing. Its modality is temporal grayscale image sequences: each sample is a sequence of consecutive frames showing progressive changes over time, so the dataset can be treated as a video prediction dataset rather than as an ordinary image classification corpus (Xie et al., 9 Jul 2025).

The central industrial problem addressed by CHDL is the prediction and modeling of the time evolution of the semiconductor wafer dicing lane during cutting or processing. This emphasis is operationally significant because wafer dicing is a critical semiconductor fabrication step, and the reported motivation includes real-time process monitoring, early defect warning, process parameter optimization, and yield and production-efficiency improvement. The dataset was created to address the absence of specialized benchmark datasets for high-precision industrial scenarios, especially those in which small prediction errors may hide or distort defects such as micro-cracks, edge chipping, or debris splashing (Xie et al., 9 Jul 2025).

A key characteristic of CHDL is that it is explicitly temporal. This distinguishes it from many wafer-inspection resources that are organized around isolated image crops or static defect labels. In CHDL, the primary object of study is the evolution of lane morphology across time, not merely the appearance of a lane at a single instant.

2. Acquisition setting and image characteristics

CHDL was collected using an industrial-grade vision system integrated with a high-precision dicing machine. The acquisition setup comprises an ADT-8230 dicing machine, a custom industrial vision subsystem, and a camera within the Automatic Alignment System. During acquisition, the wafer undergoes precise isometric translations, and the camera captures microscopic images of the dicing lane during motion (Xie et al., 9 Jul 2025).

The images are grayscale with one channel and have a reported resolution of $800 \times 600$. The acquisition protocol states that images were captured at 10 equidistant positions, at a sampling rate of 5 fps, under lighting controlled at $2000 \pm 50$ lux. About 1.3% of raw frames were abnormal due to mechanical vibration and illumination fluctuations; these abnormal frames were discarded and reconstructed via bilinear interpolation. The reported curation procedure indicates an effort to preserve temporal consistency and visual reliability under real manufacturing conditions rather than under simulation or laboratory-only conditions (Xie et al., 9 Jul 2025).

These acquisition choices define the dataset’s practical identity. CHDL is not a synthetic process trace and not a natural-scene video benchmark adapted post hoc to industry. Its microscopic textures, subtle lane morphology, and real acquisition artifacts arise from a production-relevant visual system.

3. Sequence organization and reported statistics

Each CHDL sample contains 10 consecutive frames. The dataset description splits these into an input sequence $x$, consisting of the first 5 frames, and a target sequence $y$, consisting of the next 5 frames. This establishes a sequence-to-sequence forecasting setup in which historical lane evolution is used to predict future lane evolution (Xie et al., 9 Jul 2025).

After curation, the dataset is described as containing 6,000 total input-target sample pairs, split evenly into 3,000 training samples and 3,000 validation samples. In the experimental section, however, the paper also reports CHDL in a benchmark table with $N_{train} = 4874$, $N_{test} = 1216$, $(C,H,W) = (1,600,800)$, $T = 5$, and $K = 1$. The paper itself does not fully reconcile these two descriptions.

Aspect	Reported value	Also reported
Total curated pairs	6,000	—
Split	3,000 training / 3,000 validation	$N_{train}=4874$, $2000 \pm 50$0
Channels and frame size	grayscale, $2000 \pm 50$1	$2000 \pm 50$2
Temporal organization	10 frames per sample	$2000 \pm 50$3, $2000 \pm 50$4

This discrepancy matters because CHDL is intended as a benchmark, and benchmark reproducibility depends on unambiguous protocol definitions. A plausible implication is that the paper uses differing dataset-construction and evaluation views: one based on the curated pool of 10-frame samples and another based on the split used in the reported experiments. Even with that ambiguity, the core format is clearly temporal, predictive, and high resolution.

4. Supervision, benchmark tasks, and evaluation

CHDL is not described as a dataset with fine-grained manual annotations such as bounding boxes, masks, or explicit defect labels. Its primary supervision is temporal forecasting: the model receives historical frames and is trained to predict future frames. In that sense, CHDL is self-supervised at the level of sequence prediction, with supervision emerging from future observations rather than from externally supplied categorical annotations (Xie et al., 9 Jul 2025).

The intended benchmark uses extend beyond pure frame forecasting. The dataset is explicitly positioned for three classes of downstream use: process modeling or prediction, defect detection, and digital twin development. For defect detection, the motivating examples include micro-cracks, edge chipping, and debris or splashing; the dataset’s premise is that temporal evolution may reveal such events more effectively than single-frame inspection. For digital twin development, CHDL is intended to provide real data for high-fidelity virtual dicing systems used in simulation, process optimization, and synthetic data generation (Xie et al., 9 Jul 2025).

Models evaluated on CHDL are assessed with standard video-prediction metrics: Mean Squared Error (MSE), Mean Absolute Error (MAE), and Structural Similarity Index Measure (SSIM). The reported criterion is conventional: lower MSE and MAE are better, while higher SSIM is better. The paper also presents diffusion denoising and reconstruction losses for the associated model experiments, but those losses are model-training objectives rather than dataset-specific metrics.

5. Relation to earlier wafer-dicing inspection datasets

CHDL should be distinguished from earlier wafer dicing street or lane datasets used for static defect classification. A closely related example appears in the study on GAN-based augmentation for semiconductor wafer dicing induced defects, which repeatedly frames its task as wafer dicing-induced defect inspection on dicing streets and uses an existing semiconductor wafer dicing street or lane defect dataset from prior work. That dataset consists of grayscale-ish dicing street images extracted from wafer imagery, uses wafer-type-dependent street resolutions such as $2000 \pm 50$5, $2000 \pm 50$6, $2000 \pm 50$7, $2000 \pm 50$8, and $2000 \pm 50$9 px, and resizes all images to $x$0 px for training and synthesis (Hu et al., 2024).

In that earlier classification setting, the labels are essentially flawless versus faulty streets at the street level, with faulty streets associated with defect types including chip excess, undersize, nose, chipping, wafer border, and imaging error. The dataset is heavily imbalanced, with per-wafer-type totals and faulty counts reported as: Type 1, 4,436 total and 453 faulty; Type 2, 13,504 total and 880 faulty; Type 3, 7,024 total and 133 faulty; Type 4, 428 total and 131 faulty; and Type 5, 2,368 total and 274 faulty. The train/validation/test protocol in that work is 80% train, 10% of the training portion used as validation, and 20% test, with all test sets remaining original real images (Hu et al., 2024).

A common misunderstanding is to treat CHDL as merely a renamed version of that earlier dicing-street corpus. The available evidence does not support that. The 2024 GAN paper is closely related to CHDL-like wafer dicing lane inspection, but it does not introduce CHDL as a new dataset; instead, it uses an existing street-level defect dataset and builds a GAN-based augmentation and classification pipeline around it. CHDL, by contrast, is presented as a public temporal image dataset dedicated to the wafer dicing process itself. This suggests a conceptual shift from static defect classification toward process-aware sequence modeling.

6. Benchmark difficulty, reported results, and significance

CHDL is presented as a challenging benchmark because it combines microscopic textures, subtle temporal dynamics, high fidelity requirements, sensitivity to tiny defects, and real-world acquisition noise. The dicing lane contains fine structural details that are easy for predictive models to blur or ignore, while the changes over time are small but industrially meaningful. In this setting, slight prediction errors can be consequential in ways not typically encountered in natural-video benchmarks (Xie et al., 9 Jul 2025).

The paper introducing CHDL uses it to evaluate DIFFUMA, a dual-path prediction architecture combining a parallel Mamba module for global long-range temporal context with a diffusion module, guided by temporal features, for restoration and enhancement of fine-grained spatial details. In the abstract, the paper states that on CHDL DIFFUMA reduces MSE by 39% and improves SSIM from 0.926 to a near-perfect 0.988. In the main comparison table, CHDL results are reported for ConvLSTM, PredRNN-v1, E3D-LSTM, PastNet, PredRNN-v2, SimVP, and DiffuMa, with DiffuMa at MSE 0.0371, MAE 0.1925, and SSIM 0.9254 (Xie et al., 9 Jul 2025).

These reported results are important primarily as evidence of what CHDL demands from models. The comparison table indicates that CHDL is difficult enough for standard sequence models to separate clearly in MSE, MAE, and SSIM, and the abstract’s emphasis on SSIM underscores the premium placed on structural fidelity rather than on coarse motion alone. More broadly, CHDL is significant because it introduces semiconductor wafer dicing into the public benchmark landscape as a real-world, high-resolution, industrial temporal dataset. Its stated role is not limited to model comparison; it is intended to support process monitoring, defect detection, digital twin creation, and optimization of wafer dicing operations (Xie et al., 9 Jul 2025).