Binary & Quantized Phase Control

• Binary and Quantized Phase Control is a method that restricts phase operations to a finite set of values, enabling robust and low-overhead system designs.
• It underpins applications in nanophotonics, quantum control, and high-speed communications by reducing continuous optimization to tractable combinatorial problems.
• Key architectures such as cascaded MZI arrays and bang-bang protocols in quantum systems achieve near-optimal performance with minimal hardware complexity.

Binary and quantized phase control encompasses a diverse set of architectures and algorithms that restrict phase operations—either in hardware or software—to a finite (often small) set of discrete values. This quantization is essential in nanophotonics, programmable metasurfaces, quantum control, integrated circuit design, and ultra-high-speed communications, where continuous-phase devices are inherently impractical or would impose excessive cost, complexity, or noise. Discretized phase control enables low-overhead, robust implementations of modular arithmetic, channel manipulation, logic gates, and error-correction primitives across photonic, electronic, and quantum platforms.

1. Fundamental Concepts and Mathematical Formalisms

In binary phase control, system elements (such as optical modulators, reflectarrays, or control Hamiltonians) can be toggled between two phase states, typically $0$ and $\pi$. More generally, $L$-level quantized phase control restricts phase settings to $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$. Mathematically, such control typically reduces continuous optimization or computation over $[0,2 \pi)$ to combinatorial problems over discrete alphabets, simplifying both design and implementation.

For example, in optical inner-product computation, the output phase $\mu_{\text{out}}$ is given by

$$\mu_{\text{out}} = \sum_{i=1}^{n} s_i \mu_i \pmod{2\pi},\quad s_i \in \left\{0,1\right\}$$

where phase memories $\mu_i$ and binary selector bits $s_i$ are mapped via a linear selector matrix. For $L$-level quantized reconfigurable surfaces, the phase per element is $\pi$0, with each $\pi$1 (Pavlichin et al., 2014, Rivera et al., 2021).

2. Binary and Quantized Phase Control in Photonic Circuits

Cascaded Mach–Zehnder interferometers (MZIs) provide a canonical architecture for binary phase arithmetic at the few-photon level (Pavlichin et al., 2014). Each MZI “bit-slice” includes a fixed memory phase $\pi$2 and a binary control phase $\pi$3. The arrangement encodes an inner product between phase vectors and a binary selector vector, summing only the memory phases whose corresponding controls are active ($\pi$4). Physical realization uses embedded phase shifters for $\pi$5 and rapidly switchable modulators for $\pi$6, enabling ultralow-power, high-throughput vector phase computation.

Key advances in integrated quantum information processing enable discrete, lithography-defined conditional-phase operations. For example, programmable controlled phase (CPHASE) gates on silicon photonic chips utilize “notched” ring resonator half-waveplates designed to impart precisely quantized phases ($\pi$7) to specific qubit states at the design stage (Başay et al., 2021). Binary phase control ($\pi$8) or $\pi$9-level quantization is implemented through geometric parameters of integrated nanophotonic structures with errors $L$0 in the phase steps at $L$1.

Binary/quantized phase approaches are also critical for error-correcting photonic circuits, where mod $L$2 inner product circuits functionally resemble syndrome-extractors in linear code architectures (Pavlichin et al., 2014).

3. Quantized Phase Shifts in Wireless and Reconfigurable Surfaces

Reconfigurable smart surfaces (RSS) employ binary and low-resolution phase shifters in large arrays to steer, focus, or scatter radio-frequency or optical fields (Rivera et al., 2021). Each array element’s phase shift $L$3 is quantized ($L$4), dictated by limited-bit hardware. The quantization level critically affects system throughput, especially in wireless propagation channels.

The discrete-phase RSS configuration optimization problem is formalized as: $L$5 with $L$6 the achievable sum-rate under imperfect channel state information. Greedy iterative algorithms, with complexity $L$7, provide near-optimal performance: binary ($L$8) gives 70–90% of the continuous-phase rate (gap $L$9 2 bps/Hz), while $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$0 recovers $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$1 even in multipath (NLoS) scenarios. Rate gains saturate sharply beyond $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$2. Design guidance indicates binary phase suffices in strong LoS or where hardware costs dominate; higher levels are only necessary in weak LoS or ultra-high-rate systems.

The trade-off between quantization resolution, achievable rate, and hardware complexity is explicit. The per-element hardware complexity grows exponentially with quantization bits, while achievable-rate gains are sublinear and saturate quickly, which motivates binary or low-bit strategies in practice.

4. Quantum Control and Bang–Bang (Binary) Phase Laws

In quantum control, binary (bang–bang) protocols select among discrete control Hamiltonians at each time, restricting system evolution to prescribed phase trajectories (Fei et al., 2023). Practically, this reflects limited hardware precision where only 0 or 1 (on/off) is possible per control channel. The two-stage optimization paradigm uses (1) continuous-time relaxation with penalty terms to extract a binary sequence with a controlled number of switches, and (2) switching-time optimization (STO), reducing the problem to optimizing a small number of time intervals for each constant-control segment.

The propagator is constructed piecewise: $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$3 and the cost functions (infidelity, energy deviation) are minimized subject to the binary control constraints. Penalty regularization (e.g., TV-norm for switches) ensures few transitions, which is crucial for minimizing experimental error and achieving robust control solutions.

Empirically, binary control typically achieves nearly the same fidelity as unconstrained (continuous) GRAPE solutions with a modest number ($\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$4–$\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$5) of switching events, entailing efficient computational procedures and experimentally accessible pulse sequences (Fei et al., 2023).

5. Phase Quantization in Communication Systems

High-speed communication receivers often quantize only the phase of incoming signals, discarding amplitude, to circumvent the limitations of high-speed ADCs (Singh et al., 2011). Systems employing $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$6-sector phase quantizers (with typical values $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$7) exhibit key performance-cost trade-offs. In block noncoherent AWGN channels, QPSK modulation with $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$8 recovers $\left\{ 2\pi k/L \mid k = 0, \dots, L-1 \right\}$9–$[0,2 \pi)$0 of the full-capacity and, with $[0,2 \pi)$1, $[0,2 \pi)$2. These quantized operations are implemented by cascading multiple 1-bit ADCs with analog preprocessing mixers, eliminating the need for automatic gain control.

Capacity and detection algorithms exploit permutation and rotational symmetries—reducing apparent exponential complexity to tractable computations, even for large blocks. Dithering the transmit constellation further closes the gap between quantized and unquantized performance.

$[0,2 \pi)$3

where $[0,2 \pi)$4 are $[0,2 \pi)$5-PSK symbols, $[0,2 \pi)$6 is an unknown common carrier phase, and $[0,2 \pi)$7 is AWGN.

6. Geometric and Discrete Phase Gates in Quantum Circuits

Geometric phase engineering enables discrete, robust controlled-phase (C–$[0,2 \pi)$8) gates between logical qubits encoded in binomial bosonic codes (Xu et al., 9 Nov 2025). Here, a single drive pulse on a coupler introduces a geometric phase $[0,2 \pi)$9 (quantized to $\mu_{\text{out}}$0 for CZ, $\mu_{\text{out}}$1 for CS, etc.), selectively to the $\mu_{\text{out}}$2 logical component via numerically optimized pulse envelopes and detuning calibration: $\mu_{\text{out}}$3 In binomial encoding, the codeword’s Fock support ensures only desired components acquire the phase, while all leading nonlinearities commute with the control operator, minimizing infidelity (measured process fidelity at $\mu_{\text{out}}$4 for $\mu_{\text{out}}$5). This approach generalizes directly to other quantized phases by tuning pulse areas (solid angles on the Bloch sphere).

7. Practical Limitations, Error Mechanisms, and Design Guidelines

Binary and quantized phase control schemes are subject to several fundamental limitations and trade-offs:

• Phase quantization errors scale as $\mu_{\text{out}}$6 (binary) or more generally as $\mu_{\text{out}}$7 (weighted protocols). Fine quantization improves accuracy but increases hardware and algorithmic complexity (Pavlichin et al., 2014).
• Insertion loss and crosstalk accumulate multiplicatively with the number of cascaded devices or array elements, constraining the depth, SNR, and scalability of hardware implementations.
• Thermal and phase drift necessitate calibration and possibly active feedback, especially in analog photonic and quantum settings.
• Hardware cost-per-bit (switch or shifter) grows exponentially with resolution. The marginal performance advantage saturates quickly, so binary or two-bit resolution is optimal for many scenarios, especially where energy, latency, and integration cost dominate (Rivera et al., 2021).
• Robustness: In phase-based error-correcting circuits and geometric phase-quantized quantum gates, architectures can be tuned to suppress both amplitude and phase noise, harnessing the redundancy of codewords or the commutativity of relevant Hamiltonians (Xu et al., 9 Nov 2025, Pavlichin et al., 2014).

Empirically, binary phase control enables 70–90% of full performance in communications and signal processing; two- or three-level quantization delivers $\mu_{\text{out}}$8; higher resolutions yield diminishing returns (Rivera et al., 2021, Singh et al., 2011).

Summary Table: Key Applications of Binary and Quantized Phase Control

Domain	Platform/Methodology	Quantization Role
Photonic arithmetic	MZI cascades (Pavlichin et al., 2014)	Binary selects memory phases, summing outputs
Wireless comms	RSS arrays (Rivera et al., 2021)	Elements modulate field phase (2–4 levels)
Quantum gates	SOI CPHASE (Başay et al., 2021)	Lithographic notch sets binary/N-level $\mu_{\text{out}}$9
Quantum control	Binary bang–bang (Fei et al., 2023)	On/off control Hamiltonians over time
Bosonic codes	Geometric phase (Xu et al., 9 Nov 2025)	Binary geometric $$\mu_{\text{out}} = \sum_{i=1}^{n} s_i \mu_i \pmod{2\pi},\quad s_i \in \left\{0,1\right\}$$0 via pulse area
Noncoherent comms	Sector quantization (Singh et al., 2011)	1–3 bits encode PSK phase, maximizing throughput

Phase quantization is central to architectures seeking efficient, robust, and scalable control—either for computation, communication, or quantum processing. Binary and few-level phase control paradigms are broadly justified by performance–complexity trade-offs, physical constraints, and fault-tolerance properties across platforms.