BenchMFC: Semiconductor Manufacturing Simulation Data

• BenchMFC dataset is an openly available simulation-derived time series dataset capturing detailed industrial semiconductor manufacturing processes.
• It comprises 372 simulation scenarios with multivariate time series from eight production stages and overall throughput metrics.
• The dataset supports benchmark experiments in surrogate modeling, anomaly detection, predictive maintenance, and reinforcement learning.

BenchMFC, or “Benchmark Manufacturing Fabrication Cascade,” is an openly available, simulation-derived time series dataset designed to advance machine-learning research in semiconductor smart manufacturing. The dataset is constructed from detailed simulations grounded in an Intel mini-fab factory model and formalized via Parallel Discrete-Event System Specification (PDEVS). Executed using the DEVS-Suite simulator, BenchMFC provides granular multivariate time series capturing both overall and per-stage throughput trajectories, facilitating benchmark surrogate modeling, anomaly detection, predictive maintenance, and reinforcement learning experiments. Its structured design addresses the need for public, machine-learning compatible data from realistic, industrial manufacturing settings (Pendyala et al., 2024).

1. Dataset Composition and Scope

BenchMFC consists of time series data from 372 distinct simulation scenarios, each corresponding to an 8-stage cascade configuration of a semiconductor mini-fab. The underlying process topology replicates realistic industrial flows, including feed-forward and feedback between diffusion, implantation, and lithography machines, as inspired by Intel’s MiniFab layout. Each scenario delivers a multivariate time series comprising:

• Eight per-stage throughputs: $S_1_{TH}, ..., S_8_{TH}$
• Overall cascade throughput: $Cascade_{TH}$

All scenarios are parameterized by unique tuples of product lots, operating conditions, and repair policies. The total dataset encompasses approximately 83.7 million time points, with output files provided in CSV format. The granularity of the scenarios supports benchmarking across a wide variety of manufacturing configurations.

2. Formal Modeling with PDEVS

The BenchMFC dataset is generated using a formal, component-based parallel discrete-event modeling approach. Each machine (tool) in the mini-fab is represented as an atomic DEVS model:

$$M = \langle X, Y, S, \delta_{ext}, \delta_{int}, \lambda, ta \rangle$$

where:

• $X$ (inputs): wafer lot arrivals, repair completions
• $Y$ (outputs): lot completions, failure signals
• $S$ (states): Idle, Busy$(t_p)$, Repair$(t_r)$, each with remaining-time substates
• $ta(s)$ (time advance): determined by event and machine state
• $\lambda(s)$ (output function): generates completion, repair, or failure events
• $\delta_{int}$, $\delta_{ext}$ (internal/external transitions): model dynamic tool responses

The coupled factory DEVS model, $F$, aggregates atomic tools through explicit composition rules, capturing both feed-forward (e.g., $A \to C \to E$) and feedback (e.g., $E \to C \to E$) behaviors. This systems-level formalism ensures reproducibility and accuracy in data generation.

3. Simulation Architecture and Scenario Design

BenchMFC is instantiated using the DEVS-Suite v7.0.0 simulator on a single-node computing platform. Each simulation scenario is defined by:

• Lot size distributions: 93 unique tuples for products a, b, and test wafers
• Operating conditions: four regimes (processing-driven repair, MTBF-driven repair, no repair with uniform generation, no repair with sinusoidal generation)
• Replications: One run per scenario, with fixed random seeds; additional replications are possible via reseeding

The simulation runs for 25,000 virtual minutes per scenario (approx. 17.4 days), commencing data collection at $t=0$ with no steady-state truncation. Raw DEVS outputs occur at event times; for the dataset, 1-minute time bins are used with forward-filling, matching the piecewise-constant nature of throughput.

4. Time Series Structure and Data Schema

The core variables in BenchMFC include:

• Throughput ($Throughput(t)$): cumulative lots completed per stage and cascade, recorded each minute
• Queue length ($queueLength(t)$): number of lots in queue (optional in logs)
• Tool state ($toolState(t)$): {Idle, Busy, Repair}
• Processing time ($processingTime(t)$): per-lot durations

Each scenario’s CSV file contains 25,000 rows (minutes) and 9 columns (8 stages + cascade throughput + time index). The dataset structure supports direct application to univariate and multivariate forecasting, as well as diagnostic machine learning tasks.

5. Baseline Machine Learning Evaluations

BenchMFC includes benchmark results for standard time series prediction algorithms, evaluated on typical scenarios:

• ARIMA($p,d,q$): classical linear method
• RNN / LSTM: recurrent neural network and long short-term memory architectures
• TCN (Temporal Convolutional Network): dilated causal CNN
• TFT (Temporal Fusion Transformer): attention-based with static covariates

Experimental protocol uses a 10-minute look-back window, 80/20 train-test split per series, and evaluation via MSE, MAPE (on nonzero targets), R², and MFE. Performance on a representative scenario (Pa=10, Pb=90, Tw=20, Lot Size=120, No Repair/Uniform Generation) is summarized:

Model	MSE	R²	MFE	MAPE
ARIMA	$3 \times 10^{-7}$	–6.006	$5.07 \times 10^{-4}$	8.13%
RNN	$1.35 \times 10^{-8}$	0.681	$1.04 \times 10^{-4}$	1.67%
LSTM	$9.73 \times 10^{-9}$	0.771	–$9.35 \times 10^{-5}$	1.53%
TCN	$2.29 \times 10^{-9}$	0.946	–$4.56 \times 10^{-6}$	0.51%
TFT	$2.11 \times 10^{-8}$	0.992	–$9.59 \times 10^{-3}$	13.27%

TCN offers low MSE and robust R² for univariate forecasting; TFT leverages static covariates for improved tail fitting but can show higher error near zero throughput.

6. Access, Licensing, and Benchmark Utility

The dataset and simulation code are released openly at https://github.com/comses/SCFM.git under the MIT license with CC-BY attribution. This ensures unrestricted use within both the machine learning and semiconductor manufacturing research communities.

BenchMFC serves as an industrially relevant testbed for:

• Surrogate modeling of manufacturing simulations
• Anomaly and fault detection through unsupervised time series analysis
• Reinforcement learning for dispatching and scheduling policies
• Predictive maintenance via repair-state logs and RUL estimation

7. Limitations, Future Directions, and Research Opportunities

Current limitations include the emphasis on throughput over finer-grained metrics such as cycle time, WIP, or sensor surrogates; only one replication per scenario is present, though multiple seeds can be used for further expansion. Potential enhancements include:

• Enriching the dataset with additional process diagnostics
• Scaling models to supply chain-level PDEVS representations, broadening the analysis to end-to-end systems
• Increasing stochastic replications for robust model uncertainty quantification

BenchMFC’s rigorous structure and formal grounding make it suitable for advancing research in smart factory digital twins, machine learning methodology development, and operational optimization (Pendyala et al., 2024).