Basic Block Embeddings

• BBEs are neural representations that encode a basic block's semantic, structural, and performance properties in a fixed-size vector.
• They are generated using models like LSTMs, graph neural networks, and transformer-based architectures to handle varying instruction sequences.
• BBEs enable cross-architecture simulation and precise performance prediction by providing order-invariant, program-agnostic signatures.

A Basic Block Embedding (BBE) is a neural representation of a machine code basic block, formally a function $f: \mathbb{B} \rightarrow \mathbb{R}^d$ mapping a contiguous, single-entry, single-exit instruction sequence $b_i \in \mathbb{B}$ to a $d$-dimensional real vector that encodes the block’s semantic, structural, and performance-relevant properties. BBEs have emerged as a foundational construct in cross-architecture simulation (Liu et al., 11 Dec 2025), basic block throughput estimation (Mendis et al., 2018), and graph-based microarchitectural modeling (Sykora et al., 2022). Unlike legacy representations such as Basic Block Vectors (BBVs), which are based on program-order and lack semantic interpretability or cross-program applicability, BBEs unify the deep semantics of low-level code with data-driven performance prediction and are increasingly leveraged as order-invariant, program-agnostic signatures.

1. Formal Definition and Conceptual Foundations

Let $\mathbb{B}$ denote the universe of basic blocks, each $b_i \in \mathbb{B}$ a sequence of assembly instructions. A BBE is defined as a vector $v_i = f(b_i) \in \mathbb{R}^d$ where $f$ is typically a neural encoder such as an LSTM, GNN, or an RWKV-based model, trained to capture instruction semantics and structural dependencies. The embedding $v_i$ serves as a dense, fixed-size surrogate for the variable-length, heterogeneous assembly code, facilitating downstream tasks such as performance prediction, similarity measurement, and simulation signature construction.

Distinct BBE approaches differ in normalization, abstraction, and training objectives; for example, the SemanticBBV framework normalizes operands (masking immediates and addresses), extracts multi-dimensional token features, and couples representation learning with performance regression objectives (Liu et al., 11 Dec 2025). Other systems such as Ithemal encode only opcode and operand information via hierarchical recurrent networks (Mendis et al., 2018), while GNN-based models such as GRANITE/ORACLE use graph representations to capture explicit data and control dependencies (Sykora et al., 2022).

2. Methodological Approaches to Basic Block Embedding

2.1 Token-based Neural Sequence Models

In models such as Ithemal, each basic block is disassembled into a sequence of instructions with each instruction represented as a flat token sequence encoding opcode, registers, constants, and memory markers. A learned embedding matrix $E_{\mathrm{tok}} \in \mathbb{R}^{d \times |V|}$ transforms one-hot tokens to $d$-dimensional vectors. Two-level LSTMs are used: a token-level LSTM computes per-instruction embeddings $h_{\mathrm{end}}^{(i)}$, which are then aggregated in program order by an instruction-level LSTM to produce a block embedding $z = s_N$. Throughput is predicted via a linear regressor $y = W_{\mathrm{out}}z + b_{\mathrm{out}}$ (Mendis et al., 2018).

2.2 Graph Neural Network (GNN) Approaches

GRANITE/ORACLE constructs a typed, directed graph with nodes representing instruction mnemonics and values (register writes, memory, immediates), and edges encapsulating structural adjacency and data-flow. Each node and edge type has a learnable embedding. Message passing is performed for $L$ rounds with updates for node features, edge features, and a global feature vector. The per-instruction node representations after $L$ rounds, $\{h_i^{(L)}\}$, act as BBEs; a 2-layer decoder MLP produces per-instruction contributions, summed to yield the throughput prediction (Sykora et al., 2022).

2.3 Transformer-based and Hybrid Architectures

SemanticBBV introduces an RWKV-based encoder (a hybrid Receptance-Weighted Key-Value model) with tokenization over six semantic dimensions (assembly token, instruction type, operand type, register type, access type, flags). Token-level embeddings are concatenated, followed by multiple layers of time-mixing and Δ-rule updates, resulting in a sequence of token hidden states $H = [h_1, ..., h_N]$. A self-attention pooling layer computes the fixed-size BBE: $$v_i = \sum_{j=1}^N \alpha_j h_j, \quad \text{where } \alpha_j = \frac{e^{e_j}}{\sum_{k=1}^N e^{e_k}}$$ with $$e_j = \mathbf{u}_a^\top\tanh(\mathbf{W}_a h_j + \mathbf{b}_a)$$ and learnable parameters $W_a$, $b_a$, $u_a$ (Liu et al., 11 Dec 2025).

3. Aggregation, Weighting, and Simulation Signature Construction

BBEs can be aggregated over execution traces or sampled intervals. In SemanticBBV, after basic block embeddings $v_i$ are produced, each is scaled by its observed execution frequency $$w_i = \frac{\mathrm{exec\_count}(b_i)}{\sum_j \mathrm{exec\_count}(b_j)}$$, yielding $\tilde{v}_i = w_i v_i$. These weighted BBEs are aggregated using a Set Transformer, which ensures order invariance. The encoder consists of stacked self-attention blocks (SAB), followed by Pooling-by-MultiHead-Attention (PMA), attending from a learned seed vector $s_0$ to all contextualized BBEs. The final program signature $s = g(\{w_i f(b_i)\})$ can be directly regressed to CPI or used as a performance-aware cross-program signature. This aggregation strategy explicitly biases representations toward blocks with higher runtime impact and enables efficient cross-program knowledge reuse, as demonstrated by estimating 10 SPEC CPU benchmark performances by simulating only 14 universal points, achieving 86.3% average accuracy and 7143x simulation speedup (Liu et al., 11 Dec 2025).

4. Training Objectives and Multi-task Losses

BBE training objectives are tightly coupled to downstream performance tasks:

• Triplet Loss: Enforces that structurally/semantically similar intervals have closer signatures than dissimilar ones: $$\mathcal{L}_{\text{triplet}} = \sum_{\text{triplets}} \max\left(0, \|s_a - s_p\|_2^2 - \|s_a - s_n\|_2^2 + m\right)$$ where $s_a$, $s_p$, $s_n$ are anchor, positive, and negative interval signatures, with $m$ the margin (Liu et al., 11 Dec 2025).
• Regression Loss: For CPI/throughput prediction, methods use Huber loss, normalized L1, or MAPE, depending on model (Liu et al., 11 Dec 2025, Mendis et al., 2018, Sykora et al., 2022).
• CPI Consistency Loss (optional): Penalizes embedding similarity where measured CPI diverges, encouraging the latent space to reflect performance dissimilarity (Liu et al., 11 Dec 2025).
• Multi-task Learning: In GNN models, per-microarchitecture heads share the GNN trunk, improving cross-arch generalization and reducing training time. The overall loss is the unweighted sum of task-specific MAPEs (Sykora et al., 2022).

5. Comparative Evaluation and Empirical Performance

A summary of key methodologies and their empirical results is presented below.

Method	Core Architecture	Embedding Type	Throughput/CPI Test Error
Ithemal (Mendis et al., 2018)	Hierarchical LSTM	$z = s_N \in \mathbb{R}^d$	7.9–8.9% avg norm. error
GRANITE/ORACLE (Sykora et al., 2022)	GraphNet w/ GNN blocks	$\{h_i^{(L)}\}, d=256$	6.47–7.05% (MAPE, Skylake)
SemanticBBV (Liu et al., 11 Dec 2025)	RWKV + Set Transformer	$v_i = f(b_i)$, $s = g(\cdots)$	86.3% accuracy (signature-based CPI), 7143x sim speedup

Ithemal demonstrates <0.09 normalized error with LSTMs, while GNN approaches (GRANITE/ORACLE) further reduce test MAPE to ~6.9% by capturing explicit instruction dependencies. SemanticBBV achieves high-fidelity cross-program signatures that maintain prediction accuracy under microarchitectural changes and enable simulation acceleration (Liu et al., 11 Dec 2025).

6. Semantic Robustness and Cross-Program Generalization

BBEs are explicitly constructed to reflect deep semantic similarities across code regions beyond surface syntactic correspondence. For instance, token-level normalization (e.g., mapping all immediates/memory to IMM) ensures that blocks differing only in literals map to nearby regions in latent space. In SemanticBBV, two blocks implementing a bounds check (e.g., “cmp rdi,IMM; jae L”), from distinct binaries, are embedded close together despite disjoint compilers or addresses. Conversely, blocks with dissimilar semantics but matched instruction counts (e.g., add vs mul) are embedded far apart. This property underpins cross-program clustering and reuse, as semantically alike BBEs across different programs populate the same Set Transformer clusters, establishing universal simulation points and enabling efficient microarchitectural performance estimation (Liu et al., 11 Dec 2025).

7. Limitations, Extensions, and Outlook

While BBEs exhibit strong performance and semantic transfer capabilities, certain challenges remain. Sequence models may struggle to capture fine-grained data dependencies compared to GNNs, while GNN-based BBEs may incur higher computational cost. Most approaches require extensive pre-training on large corpora of machine code and detailed normalization pipelines. There is a continuing trend toward modular multi-task learning (e.g., per-architecture heads) and self-supervised semantic objectives beyond throughput/CPI. A plausible implication is expanding BBE utility to portability across instruction sets and model architectures, as well as application to binary similarity and reverse engineering.

In summary, BBEs have redefined the representation of basic blocks for performance estimation and simulation, moving from index-based vectors to learned, semantically meaningful, and performance-sensitive embeddings. Through neural sequence, set, and graph aggregation methods, BBEs unify accurate prediction, generalization, and cross-program reuse, and are now central in state-of-the-art microarchitectural analysis pipelines (Liu et al., 11 Dec 2025, Mendis et al., 2018, Sykora et al., 2022).