Optimizing 3D Gaussian Splattering for Mobile GPUs (2511.16298v1)

Abstract: Image-based 3D scene reconstruction, which transforms multi-view images into a structured 3D representation of the surrounding environment, is a common task across many modern applications. 3D Gaussian Splatting (3DGS) is a new paradigm to address this problem and offers considerable efficiency as compared to the previous methods. Motivated by this, and considering various benefits of mobile device deployment (data privacy, operating without internet connectivity, and potentially faster responses), this paper develops Texture3dgs, an optimized mapping of 3DGS for a mobile GPU. A critical challenge in this area turns out to be optimizing for the two-dimensional (2D) texture cache, which needs to be exploited for faster executions on mobile GPUs. As a sorting method dominates the computations in 3DGS on mobile platforms, the core of Texture3dgs is a novel sorting algorithm where the processing, data movement, and placement are highly optimized for 2D memory. The properties of this algorithm are analyzed in view of a cost model for the texture cache. In addition, we accelerate other steps of the 3DGS algorithm through improved variable layout design and other optimizations. End-to-end evaluation shows that Texture3dgs delivers up to 4.1$\times$ and 1.7$\times$ speedup for the sorting and overall 3D scene reconstruction, respectively -- while also reducing memory usage by up to 1.6$\times$ -- demonstrating the effectiveness of our design for efficient mobile 3D scene reconstruction.

• The paper introduces texture-optimized sorting with layout transformation techniques that reduce cache misses by up to 60% on mobile GPUs.
• The paper achieves up to 4.1× speedup in sorting and 1.7× overall pipeline improvement through efficient block-based storage and stage fusion.
• The approach enables near-real-time 3D reconstruction on mobile devices by minimizing memory bandwidth usage and enhancing spatial data locality.

Optimized 3D Gaussian Splatting for Mobile GPU Architectures

Introduction and Motivation

Efficient image-based 3D scene reconstruction on mobile platforms demands lightweight, memory-aware algorithms due to constraints native to mobile GPU hardware (e.g., reduced memory bandwidth, tile-based rendering, and restrictive memory hierarchies). The explicit rendering framework of 3D Gaussian Splatting (3DGS) is advantageous compared to prior NeRF-based approaches for its reduced compute overhead, parallelization capabilities, and capacity for photorealistic synthesis. However, mapping 3DGS onto mobile GPUs is nontrivial due to hardware-specific asymmetries, especially the peculiarities of mobile texture memory, which differs markedly from shared/global memory used in desktop GPUs.

Figure 1: Schematic of the 3DGS rendering pipeline, emphasizing tile-duplication, sorting, and performant rasterization steps for parallel rendering.

Mobile GPU Architecture and Texture Memory Constraints

Mobile GPUs use a 2.5D texture memory hierarchy, with cache organization and data representation fundamentally distinct from desktop-based systems. The texture cache is organized to exploit spatial locality along two dimensions, with each texel storing a short vector (length 4). Performance depends critically on coalesced, spatially-local block accesses. Failure to exploit these hardware features results in frequent cache misses and bandwidth bottlenecks.

Figure 2: Overview of the mobile GPU memory hierarchy, illustrating the role of texture caches in high-throughput rendering.

Sorting: Bottleneck in 3DGS and Prior Approaches

Sorting dominates the computational load in 3DGS pipelines for mobile platforms. Historically, GPU-based sorting methods (bitonic sort, periodic balanced sorting networks) have been ported from desktop architectures assuming abundant shared memory and do not address the spatial locality required by mobile texture memory. Existing work, e.g., GPUTeraSort, leverages block-based partitioning and merging algorithms but their cache model is not well-adapted to modern mobile GPUs: average pairwise comparison distances can be large, leading to cache Thrashing.

Figure 3: Illustration of bitonic sorting network stages and spatial data partitions, highlighting memory access patterns per sorting step.

Figure 4: Visualization of GPUTeraSort's block-wise sort operations, with spatial pairing across quad sizes and the corresponding locality implications.

Figure 5: Three allocation modes for data quads in texture memory, situational to block size and cache organization.

Innovations in Texture-Optimized Sorting

This work introduces two major algorithmic advances:

Layout Transformation: A critical innovation is the layout transformation at every sorting step. Compared pairs are placed contiguously in memory, minimizing stride lengths and maximizing block cache reuse. This requires index transformation during output tensor writes, maintaining bitonic network invariants while reducing cache misses.

Figure 6: Detailed view of the optimized sorting pipeline: successive stages ensure compare operations are local, with index transformation enabling memory adjacency.

Figure 7: Conceptual illustration of layout transformation, mapping logical segments to physically adjacent regions for cache efficiency.

Stage Fusion: Given each texture point is a 4-vector, final sorting stages are fused so each kernel can handle four compare-and-swap operations within a single memory access, amortizing memory bandwidth and kernel launch overhead.

Block-Based Storage: Sorted outputs are arranged in blocks matched to cache line dimensions (e.g., $32 \times 32$), further improving spatial locality.

Figure 8: Block-based storage layout for key-value pairs, facilitating efficient downstream access in rendering and range queries.

Data Layout and Variable Packing

The authors propose a variable packing approach that reorganizes both input and output data structures (such as Gaussian parameters) for optimal texture usage. Groups of parameters are tightly packed and mapped to adjacent texels to maximize read efficiency, minimizing wasted accesses in SIMT execution.

Key Normalization and Downstream Optimization

Key normalization converts the 64-bit integer keys to 32-bit floating point representations, balancing precision and memory bandwidth usage for mobile constraints—partitioning bits for tile indexing and Gaussian depth normalization.

Figure 9: Key normalization methodology, compacting tile and depth information for floating-point sorting.

Experimental Results

Substantial numerical improvements are reported:

• Sorting pipeline speedups of up to 4.1× versus GPUTeraSort and TensorFlowLite baselines.
• End-to-end 3DGS pipeline achieves 1.7× overall speedup and 1.6× lower memory consumption compared to 3dgs.cpp baseline.
• L1 texture cache misses reduced by up to 60%, L2 misses by 25%.
• Sorting benchmarks versus VKRadixSort deliver 10–15% lower latency.

  Figure 10: Latency comparison for sorting as a function of dataset size, normalized to the presented method.

  

Figure 11: L1 cache miss rate profile, showing marked reduction due to layout transformation and stage fusion.

Figure 12: Normalized overall pipeline latency for a spectrum of datasets against baseline 3dgs.cpp.

Figure 13: Comparative memory access count, demonstrating efficient packing and reduced movement.

Figure 14: End-to-end latency on benchmark datasets, compared to VKRadixSort; results normalized by the proposed implementation.

Portability and Generalization

Performance on additional hardware (XiaoMi 6, Redmi Note 10) demonstrates portability and robustness—the optimizations do not rely on specific, undocumented hardware behaviors.

Figure 15: Performance metrics for sorting on legacy mobile hardware (XiaoMi 6).

Theoretical and Practical Implications

This work illustrates that sorting—previously a limiting factor in parallel 3DGS pipelines—can be fundamentally re-engineered by memory-centric algorithmic redesign aligned with mobile GPU hardware constraints. The approach is orthogonal to existing methods in 3DGS model compression, quantization, and pruning and can be combined with such techniques for further gains. The results suggest that near-real-time, on-device 3D reconstruction, AR, and robotics workloads become feasible even on bandwidth-limited, edge-class hardware. The mechanisms are equally applicable to other rasterization and transparency-driven rendering/depth sorting applications and may inform future kernel/primitive design for mobile NPUs, DSPs, and heterogeneous architectures.

Conclusion

The presented framework delivers robust, texture-cache-aware optimization for 3D Gaussian Splatting on mobile GPUs, achieving strong improvements in both speed and memory efficiency. The central advancements—layout transformation and multi-stage fusion—are substantiated by detailed hardware performance modeling and validated across multiple devices and datasets. This unlocks new deployment opportunities for efficient, privacy-preserving 3D rendering and reconstruction in edge environments. Future directions include adapting the methodology for dynamic/adaptive resolution settings and porting sorting and layout optimization techniques to emergent accelerators beyond standard mobile GPUs.

(2511.16298)