An efficient probabilistic hardware architecture for diffusion-like models (2510.23972v1)

Abstract: The proliferation of probabilistic AI has promoted proposals for specialized stochastic computers. Despite promising efficiency gains, these proposals have failed to gain traction because they rely on fundamentally limited modeling techniques and exotic, unscalable hardware. In this work, we address these shortcomings by proposing an all-transistor probabilistic computer that implements powerful denoising models at the hardware level. A system-level analysis indicates that devices based on our architecture could achieve performance parity with GPUs on a simple image benchmark using approximately 10,000 times less energy.

• The paper presents an efficient hardware framework for diffusion-like models, achieving GPU-equivalent performance with approximately 10^4 times less energy consumption.
• It employs denoising thermodynamic models that sequentially chain simple energy-based models to overcome the mixing expressivity trade-off and maintain efficient sampling.
• The architecture integrates an all-transistor RNG and adaptive correlation penalties to stabilize training, paving the way for scalable and hybrid AI systems.

Efficient Probabilistic Hardware Architectures for Diffusion-like Models

This paper presents a comprehensive framework for implementing denoising thermodynamic models (DTMs) on all-transistor probabilistic hardware, demonstrating that such systems can achieve performance parity with GPU-based deep learning models while consuming approximately $10^4$ times less energy. The work addresses fundamental limitations of previous probabilistic computing approaches, introduces a scalable architecture for hardware-accelerated energy-based models (EBMs), and provides detailed analysis and experimental validation of the proposed hardware components.

Motivation and Context

The exponential growth in AI compute demand is projected to place significant strain on global energy infrastructure, with data centers potentially consuming 10% of US energy production by 2030. Current AI systems, particularly those based on LLMs, are optimized for GPU architectures, which are not inherently energy-efficient for probabilistic inference. The "Hardware Lottery" has entrenched suboptimal hardware-algorithm pairings, motivating exploration of alternative computing paradigms.

Probabilistic computing, especially via EBMs, offers a direct connection to statistical modeling tasks in AI. However, prior hardware implementations have been hampered by two major issues: (1) reliance on monolithic EBMs, which suffer from poor scalability due to the mixing-expressivity tradeoff (MET), and (2) dependence on exotic, unscalable components (e.g., magnetic tunnel junctions) for random number generation (RNG).

Mixing-Expressivity Tradeoff in EBMs

Monolithic EBMs model data distributions by shaping a parameterized energy landscape. As the expressivity of the EBM increases to fit multimodal data, the energy barriers between modes become larger, resulting in exponentially slow mixing times for iterative samplers such as Gibbs sampling. This coupling of modeling power and sampling difficulty leads to high energy consumption and unstable training dynamics.

Figure 1: The mixing-expressivity tradeoff in EBMs, illustrating how increased expressivity leads to poor mixing and high sampling cost.

Empirical results on Fashion-MNIST demonstrate that MEBMs with high modeling performance require orders of magnitude more energy for inference compared to DTMs, despite using similar hardware.

Denoising Thermodynamic Models: Architecture and Theory

DTMs circumvent the MET by sequentially composing multiple EBMs to model a denoising process, analogous to diffusion models. Each EBM in the chain models a simple conditional distribution, allowing the overall system to express complex data distributions while maintaining tractable sampling at each step. The forward process transforms data into noise via a Markov chain, and the reverse process is learned by approximating the conditionals with EBMs.

Figure 2: Denoising thermodynamic computer architecture, showing the chaining of hardware EBMs for efficient denoising.

The architecture supports the introduction of latent variables, enabling independent scaling of model complexity and data dimension. Theoretical analysis shows that as the number of denoising steps increases, the energy landscape of each EBM becomes simpler, further reducing sampling difficulty.

Hardware Implementation: All-Transistor RNG and Gibbs Sampling

A key contribution is the design and fabrication of a fast, energy-efficient, and compact all-transistor RNG, leveraging the shot-noise dynamics of subthreshold transistor networks. The RNG exhibits a programmable sigmoidal response to input voltage, enabling direct implementation of the Gibbs sampling update rule for Boltzmann machines.

Figure 3: Laboratory characterization of the all-transistor RNG, demonstrating programmable bias and robust performance across process corners.

Boltzmann machines are chosen for their hardware efficiency, with each variable implemented as a Bernoulli sampling circuit. The architecture supports massively parallel chromatic Gibbs sampling, exploiting the bipartite structure of the connectivity graph.

Figure 4: Schematic of chromatic Gibbs sampling, enabling parallel updates of non-neighboring nodes in hardware.

Physical modeling and experimental measurements yield an estimated per-cell energy consumption of $\sim 2$ fJ, with the overall system achieving $10^4$-fold energy reduction compared to GPU-based inference on Fashion-MNIST.

Figure 5: Central result—DTM-based probabilistic computer matches GPU performance on Fashion-MNIST with $10^4\times$ less energy.

Training and Stability: Adaptive Correlation Penalty

DTMs are trained using Monte Carlo gradient estimators, with each layer's gradients computed independently. The architecture allows for short mixing times, enabling nearly unbiased gradient estimates. Training stability is further enhanced by introducing an adaptive total correlation penalty (ACP), which dynamically regularizes the latent variable EBMs to maintain tractable mixing.

Figure 6: Generated images and training stability comparison between DTMs and MEBMs, highlighting the superior stability of DTMs with ACP.

Empirical results show that DTMs with ACP exhibit monotonic improvement in model quality and maintain low autocorrelation throughout training, in contrast to MEBMs which suffer from instability due to non-equilibrium sampling.

Scaling and Hybrid Architectures

While DTMs can be scaled by increasing depth and width, practical limitations arise from hardware connectivity constraints and the embedding of complex data into binary variables. The paper proposes hybrid thermodynamic-deterministic machine learning (HTDML) systems, integrating probabilistic hardware with traditional neural networks to optimize energy efficiency for specific tasks.

Figure 7: Hybrid architecture—embedding CIFAR-10 data into a DTM using a small neural network, achieving GAN-level performance with $10\times$ smaller deterministic models.

The authors provide open-source software for simulating hardware EBMs and discuss the feasibility of scaling to chips with $10^6$ sampling cells, far exceeding the size of models demonstrated in the paper.

Energetic Analysis and Practical Considerations

Detailed physical models are presented for all hardware subsystems, including biasing circuits, local and global communication, and memory. The analysis accounts for parasitic capacitance, wire routing, and clock distribution, providing realistic estimates of energy consumption. Supporting circuitry and off-chip communication are shown to be negligible at the system level due to the dominance of sampling energy.

Figure 8: Physical parameters for energy modeling—capacitance and signaling energy as a function of connectivity and wire length.

Empirical measurements on NVIDIA A100 GPUs validate the theoretical energy estimates, confirming the substantial efficiency gains of the proposed architecture.

Conclusion and Future Directions

This work establishes a scalable, energy-efficient architecture for probabilistic machine learning using all-transistor hardware. By leveraging DTMs and modular EBMs, the system overcomes fundamental limitations of previous approaches and achieves strong empirical performance with orders-of-magnitude energy savings. The integration of adaptive regularization and hybrid architectures opens avenues for further scaling and application to complex datasets.

Future research directions include:

• Joint training of embedding networks and DTMs for improved information flow.
• Development of software-defined graphical models for non-local information routing.
• Exploration of richer variable types and connectivity patterns in hardware EBMs.
• Realization of large-scale probabilistic computers using advanced CMOS processes.

The implications for AI hardware are significant, suggesting that probabilistic computing can play a central role in the design of next-generation energy-efficient machine learning systems.