Papers
Topics
Authors
Recent
Assistant
AI Research Assistant
Well-researched responses based on relevant abstracts and paper content.
Custom Instructions Pro
Preferences or requirements that you'd like Emergent Mind to consider when generating responses.
Gemini 2.5 Flash
Gemini 2.5 Flash 148 tok/s
Gemini 2.5 Pro 48 tok/s Pro
GPT-5 Medium 34 tok/s Pro
GPT-5 High 40 tok/s Pro
GPT-4o 101 tok/s Pro
Kimi K2 183 tok/s Pro
GPT OSS 120B 443 tok/s Pro
Claude Sonnet 4.5 35 tok/s Pro
2000 character limit reached

Time- and Behavior-Preserving Execution of Determinate Supervisory Control (2312.05011v1)

Published 8 Dec 2023 in eess.SY and cs.SY

Abstract: The activity framework is a promising model-based design approach for Flexible Manufacturing Systems (FMS). It is used in industry for specification and analysis of FMS. It provides an intuitive specification language with a hierarchical view of the system's actions and events, activities built from them, and an automaton that captures the overall behavior of the system in terms of sequences of activities corresponding to its accepted words. It also provides a scalable timing analysis method using max-plus linear systems theory. The framework currently requires manual implementation of the supervisory controller that governs the system behavior. This is labor-intensive and error-prone. In this article, we turn the framework into a model-driven approach by introducing an execution architecture and execution engine that allow a specification to be executed in a time- and behavior-preserving fashion. We prove that the architecture and engine preserve the specified ordering of actions and events in the specification as well as the timing thereof up to a specified bound. We validate our approach on a prototype production system.

Definition Search Book Streamline Icon: https://streamlinehq.com
References (19)
  1. ElMaraghy, H.A.: Flexible and reconfigurable manufacturing systems paradigms. International journal of flexible manufacturing systems 17(4), 261–276 (2005) Nicolescu and Mosterman [2018] Nicolescu, G., Mosterman, P.: Model-Based Design for Embedded Systems, (2018). https://doi.org/10.1201/9781315218823 Schmidt [2006] Schmidt, D.C.: Model-driven engineering. Computer-IEEE Computer Society- 39(2), 25 (2006) van der Sanden et al. [2016] Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Nicolescu, G., Mosterman, P.: Model-Based Design for Embedded Systems, (2018). https://doi.org/10.1201/9781315218823 Schmidt [2006] Schmidt, D.C.: Model-driven engineering. Computer-IEEE Computer Society- 39(2), 25 (2006) van der Sanden et al. [2016] Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Schmidt, D.C.: Model-driven engineering. Computer-IEEE Computer Society- 39(2), 25 (2006) van der Sanden et al. [2016] Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  2. Nicolescu, G., Mosterman, P.: Model-Based Design for Embedded Systems, (2018). https://doi.org/10.1201/9781315218823 Schmidt [2006] Schmidt, D.C.: Model-driven engineering. Computer-IEEE Computer Society- 39(2), 25 (2006) van der Sanden et al. [2016] Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Schmidt, D.C.: Model-driven engineering. Computer-IEEE Computer Society- 39(2), 25 (2006) van der Sanden et al. [2016] Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  3. Schmidt, D.C.: Model-driven engineering. Computer-IEEE Computer Society- 39(2), 25 (2006) van der Sanden et al. [2016] Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  4. Sanden, B., Bastos, J., Voeten, J., Geilen, M., Reniers, M., Basten, T., Jacobs, J., Schiffelers, R.: Compositional specification of functionality and timing of manufacturing systems. In: 2016 Forum on Specification and Design Languages (FDL), pp. 1–8 (2016). IEEE van der Sanden et al. [2015] Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  5. Sanden, B., Reniers, M., Geilen, M., Basten, T., Jacobs, J., Voeten, J., Schiffelers, R.: Modular model-based supervisory controller design for wafer logistics in lithography machines. In: 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), pp. 416–425 (2015). https://doi.org/10.1109/MODELS.2015.7338273 van der Sanden et al. [2021] Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  6. Sanden, B., Blankenstein, Y., Schiffelers, R., Voeten, J.: LSAT: Specification and analysis of product logistics in flexible manufacturing systems. In: 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), pp. 1–8 (2021). IEEE Mohamadkhani et al. [2023] Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  7. Mohamadkhani, A., Geilen, M., Voeten, J., Basten, T.: Modeling and analysis of switching max-plus linear systems with discrete-event feedback. Discrete Event Dynamic Systems 33(3), 341–372 (2023) Adyanthaya et al. [2017] Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  8. Adyanthaya, S., Ara, H.A., Bastos, J., Behrouzian, A., Sánchez, R.M., Pinxten, J., Sanden, B., Waqas, U., Basten, T., Corporaal, H., Frijns, R., Geilen, M., Goswami, D., Hendriks, M., Stuijk, S., Reniers, M., Voeten, J.: xCPS: a tool to explore cyber physical systems. ACM SIGBED Review 14(1), 81–95 (2017) Lynch and Tuttle [1988] Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  9. Lynch, N.A., Tuttle, M.R.: An Introduction to Input/output Automata. Laboratory for Computer Science, Massachusetts Institute of Technology, Massachusetts, United States (1988) Ramadge and Wonham [1987] Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  10. Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete event processes. SIAM journal on control and optimization 25(1), 206–230 (1987) Derler et al. [2008] Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  11. Derler, P., Feng, T.H., Lee, E.A., Matic, S., Patel, H.D., Zhao, Y., Zou, J.: Ptides: A programming model for distributed real-time embedded systems. University of California, Berkeley, EECS Technical Report. EECS-2008-72 (2008) van Kampenhout et al. [2015] van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  12. van Kampenhout, R., Stuijk, S., Goossens, K.: A scenario-aware dataflow programming model. In: 2015 Euromicro Conference on Digital System Design, pp. 25–32 (2015). IEEE Zhou et al. [1992] Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  13. Zhou, M.C., Dicesare, F., Rudolph, D.L.: Design and implementation of a Petri net based supervisor for a flexible manufacturing system. Automatica 28(6), 1199–1208 (1992) Lohstroh et al. [2021] Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  14. Lohstroh, M., Menard, C., Bateni, S., Lee, E.A.: Toward a Lingua Franca for deterministic concurrent systems. ACM Transactions on Embedded Computing Systems (TECS) 20(4), 1–27 (2021) Amnell et al. [2004] Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  15. Amnell, T., Fersman, E., Mokrushin, L., Pettersson, P., Yi, W.: Times: a tool for schedulability analysis and code generation of real-time systems. In: Formal Modeling and Analysis of Timed Systems: First International Workshop, FORMATS 2003, Marseille, France, September 6-7, 2003. Revised Papers 1, pp. 60–72 (2004). Springer Kopetz and Bauer [2003] Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  16. Kopetz, H., Bauer, G.: The time-triggered architecture. Proceedings of the IEEE 91(1), 112–126 (2003) https://doi.org/10.1109/JPROC.2002.805821 Theelen et al. [2006] Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  17. Theelen, B., Geilen, M., Basten, T., Voeten, J., Gheorghita, S.V., Stuijk, S.: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In: Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE’06. Proceedings., pp. 185–194 (2006). IEEE Peterson [1981] Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  18. Peterson, J.L.: Petri Net Theory and the Modeling of Systems, 1st edn. Prentice Hall PTR, Upper Saddle River, NJ, United States (1981) Alur and Dill [1994] Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994) Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
  19. Alur, R., Dill, D.L.: A theory of timed automata. Theoretical computer science 126(2), 183–235 (1994)
Citations (1)
View on Semantic Scholar

Summary

We haven't generated a summary for this paper yet.

Ai Sparkles Streamline Icon: https://streamlinehq.com Summarize Now
Dice Question Streamline Icon: https://streamlinehq.com

Open Problems

We haven't generated a list of open problems mentioned in this paper yet.

Ai Sparkles Streamline Icon: https://streamlinehq.com Generate Now
Lightbulb Streamline Icon: https://streamlinehq.com

Continue Learning

We haven't generated follow-up questions for this paper yet.

Ai Sparkles Streamline Icon: https://streamlinehq.com Generate Now
List To Do Tasks Checklist Streamline Icon: https://streamlinehq.com

Collections

Sign up for free to add this paper to one or more collections.

User Circle Single Streamline Icon: https://streamlinehq.com Sign Up