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CMOS back-end-of-line compatible ferroelectric tunnel junction devices (2108.10941v1)

Published 24 Aug 2021 in physics.app-ph and cond-mat.mtrl-sci

Abstract: Ferroelectric tunnel junction devices based on ferroelectric thin films of solid solutions of hafnium dioxide can enable CMOS integration of ultra-low power ferroelectric devices with potential for memory and emerging computing schemes such as in-memory computing and neuromorphic applications. In this work, we present ferroelectric tunnel junctions based on Hf${0.5}$Zr${0.5}$O${2}$ with materials and processes compatible with CMOS back-end-of-line integration. We show a device architecture based on W-Hf${0.5}$Zr${0.5}$O${2}$-Al${2}$O${3}$-TiN stacks featuring low temperature annealing at 400{\deg}C with performance comparable to those obtained with higher temperature annealing conditions.

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