A Ferroelectric Semiconductor Field-Effect Transistor

Abstract: Ferroelectric field-effect transistors employ a ferroelectric material as a gate insulator, the polarization state of which can be detected using the channel conductance of the device. As a result, the devices are of potential to use in non-volatile memory technology, but suffer from short retention times, which limits their wider application. Here we report a ferroelectric semiconductor field-effect transistor in which a two-dimensional ferroelectric semiconductor, indium selenide ({\alpha}-In2Se3), is used as the channel material in the device. {\alpha}-In2Se3 was chosen due to its appropriate bandgap, room temperature ferroelectricity, ability to maintain ferroelectricity down to a few atomic layers, and potential for large-area growth. A passivation method based on the atomic-layer deposition of aluminum oxide (Al2O3) was developed to protect and enhance the performance of the transistors. With 15-nm-thick hafnium oxide (HfO2) as a scaled gate dielectric, the resulting devices offer high performance with a large memory window, a high on/off ratio of over 108, a maximum on-current of 862 {\mu}A {\mu}m-1, and a low supply voltage.

• The paper demonstrates a novel FeS-FET using α-In2Se3 that overcomes short retention times in conventional Fe-FETs.
• Device fabrication using ALD-deposited Al2O3 passivation yields an on/off ratio exceeding 10^6 and an on-current of 862 μA/μm.
• Simulations with Poisson’s and Ginzburg-Landau equations validate the simultaneous ferroelectric and semiconducting behavior for advanced memory integration.

Overview of "A Ferroelectric Semiconductor Field-Effect Transistor"

This paper presents a detailed exploration and engineering of a novel ferroelectric semiconductor field-effect transistor (FeS-FET) that utilizes a two-dimensional ferroelectric semiconductor, α-In2Se3, as the channel material. The research addresses the historical limitations associated with ferroelectric field-effect transistors (Fe-FETs), notably short retention times, by introducing α-In2Se3 due to its properties such as an appropriate bandgap (~1.39 eV), stable room-temperature ferroelectricity, and the ability to maintain ferroelectricity down to a few atomic layers. These attributes make it a candidate for large-area device fabrication and integration in non-volatile memory applications.

Device Fabrication and Material Characterization

The paper outlines the use of a passivation method involving aluminum oxide (Al2O3) deposited on α-In2Se3 through atomic-layer deposition (ALD). This step is crucial to both protect and enhance device performance. Notably, the FeS-FETs developed exhibit a high on/off ratio exceeding 10^6, an on-current of 862 μA/μm, and operational capability at lower supply voltages. These performance metrics mark significant improvements over conventional Fe-FETs.

Material characterization confirms the desirable properties of α-In2Se3, including its ferroelectricity as evidenced by piezoresponse force microscopy (PFM), photoluminescence, and Raman spectroscopy, presenting evidence of strong piezoelectric response. The structural integrity and crystallinity were verified through high-angle annular dark field scanning transmission electron microscopy (HAADF-STEM).

Operational Mechanism and Performance Outcomes

The proposed FeS-FET distinguishes itself from traditional Fe-FET by having the ferroelectric properties in the semiconductor itself and utilizes a high-quality amorphous gate insulator instead of a polycrystalline ferroelectric insulator. This configuration is engineered to screen the depolarization field that typically plagues Fe-FETs with charge trapping issues and gate leakage currents.

The research delineates the polarization characteristics responsible for the device behavior in FeS-FETs, emphasizing both clockwise and counterclockwise hysteretic behavior, depending on the effective oxide thickness (EOT). Low EOT conditions allow for full polarization switching, resulting in counterclockwise hysteresis, whereas high EOT conditions trigger partial switching, yielding clockwise hysteresis. These hysteresis loops serve as indicators of the device's operational states and memory retention capabilities.

Simulation and Theoretical Implications

Device-level simulations, employing a mix of Poisson’s equation, Ginzburg-Landau equation, and 2D charge equations, provide a foundational understanding of the operation of FeS-FETs. These simulations confirm the experimental results, demonstrating the concurrent ferroelectric and semiconducting behavior of α-In2Se3, which is central to the performance characteristics of the device.

Implications and Future Prospects

The findings in this research have significant ramifications for the scalability and integration of non-volatile memory technology. The unique ferroelectric characteristics of α-In2Se3, when paired with the technological advancements highlighted, point towards potential future developments in ultra-low power electronic applications. The research suggests that, through further material and device engineering, FeS-FETs can surpass current non-volatile memory technologies in performance and reliability. Moreover, the proposed concept of an all-ferroelectric Fe-FET composed of both ferroelectric insulator and semiconductor could pave the way for new types of steep-slope, hysteresis-free transistors, significantly impacting the landscape of semiconductor device engineering.

In conclusion, the paper presents a comprehensive study of FeS-FETs with promising results in memory applications due to significant performance improvements, potentially overcoming long-standing challenges in ferroelectric transistor technologies. Such advancements suggest a path forward for the application of 2D ferroelectric semiconductors in future high-performance electronic devices.