Formalisation of partially time-neutral process theories

Develop a full formalisation of partially time-neutral process theories by defining a wiring operad that treats vertical wires as inputs/outputs subject to acyclicity while treating horizontal-plane wires time-neutrally, and specify the corresponding operad algebras and composition rules.

Background

The paper introduces the concept of a process theory where some systems are time-neutral and others retain an input/output structure. It sketches an operadic diagrammatic idea with vertical wires constrained by acyclicity and horizontal wires treated time-neutrally.

The authors indicate that a full formalisation—precisely defining the operad, its operations, and the associated algebras—remains to be completed, highlighting an explicit direction for future work.