Comparison with adaptive per-iteration DVFS controllers

Establish whether the calibrated decode-lane power cap outperforms adaptive per-iteration DVFS controllers, such as VoltanaLLM and DualScale, when all methods run on the same disaggregated serving stack under the same tail-latency SLO gate.

Background

The decode-actuator A/B study compares the calibrated power cap only with static clock-locking policies: a throughput-optimal lock and an aggressive lock. The authors explicitly state that adaptive per-iteration DVFS controllers were not run on their serving stack, so the reported superiority of capping is limited to static locking. A controlled comparison under identical stack, workload, and SLO conditions remains unresolved.