Shuttling a single charge across a one-dimensional array of silicon quantum dots (1809.03976v1)

Abstract: Significant advances have been made towards fault-tolerant operation of silicon spin qubits, with single qubit fidelities exceeding 99.9%, several demonstrations of two-qubit gates based on exchange coupling, and the achievement of coherent single spin-photon coupling. Coupling arbitrary pairs of spatially separated qubits in a quantum register poses a significant challenge as most qubit systems are constrained to two dimensions (2D) with nearest neighbor connectivity. For spins in silicon, new methods for quantum state transfer should be developed to achieve connectivity beyond nearest-neighbor exchange. Here we demonstrate shuttling of a single electron across a linear array of 9 series-coupled Si quantum dots in ~50 ns via a series of pairwise interdot charge transfers. By progressively constructing more complex pulse sequences we perform parallel shuttling of 2 and 3 electrons at a time through the 9-dot array. These experiments establish that physical transport of single electrons is feasible in large silicon quantum dot arrays.

• The paper demonstrates rapid single electron shuttling through a nine-dot silicon quantum dot array, completing charge transfer in approximately 50 ns.
• It employs a dual-layer gate design with virtual gates to precisely control electron confinement and navigate a nine-dimensional capacitance matrix.
• The study offers actionable insights for scalable quantum processor design by extending quantum state transfer beyond nearest-neighbor limitations.

Overview of Single Charge Shuttling in Silicon Quantum Dots

The paper presents a robust experimental validation of single charge shuttling across a one-dimensional array of silicon quantum dots. The work successfully demonstrates a charge transport method through nine series-coupled silicon quantum dots, achieving electron transit in a remarkably short timeframe of approximately 50 ns. This experiment advances the state of the art in quantum state transfer (QST) protocols by moving beyond the limitations of nearest-neighbor connectivity, which traditionally constrains qubit architectures to two-dimensional proximal interactions.

The experimental setup is constructed with quantum dots in an undoped $^{28}$Si/SiGe heterostructure, utilizing a dual-layer gate design to control electron confinement and tunneling via plunger and barrier gates. Emphasizing scalability, the authors delineate the creation of a highly controlled quantum environment where precise charge manipulation is achieved through a sophisticated control of plunger voltages. Specifically, virtual gates are employed to navigate a nine-dimensional parameter space based on a calibrated capacitance matrix, leading to isolated single-dot control.

Strong Numerical Findings and Methodology

The research features several noteworthy numerical performances, particularly the ability to shuttle electrons through a linear configuration of nine quantum dots an order of magnitude faster than the electron spin dephasing time in natural silicon. Such a rapid transit—at a pace significantly faster than $T_2^* \sim$ 1 μs—implies that charge transfer occurs well within the coherence timescales for silicon-based spin qubits. Notably, the work also extended the understanding of shuttle parallelization. By demonstrating multi-electron shuttling (e.g., two and three electrons concurrently), the research underscores the robustness and scalability of their approach, specifically the ability to maintain expected currents $I = nf$ (where $n$ is the number of electrons) under varying shuttle sequence complexities.

Beyond the empirical findings, the paper successfully implements a meticulous contraction of the nine-dot charge stability space into a lower-dimensional manifold, utilizing orthogonally configured virtual gates to ensure that electron alignment within desired states is consistent despite individual dot potential variations.

Implications and Future Directions

This research has practical implications for the architecture of spin-based quantum processors. The ability to shuttle charges efficiently through an extended quantum dot array opens pathways for intermediate-scale QST technologies. In terms of architectural design for quantum computation, such findings may enable more elaborate qubit connectivity regimes by laying the groundwork for extending quantum interaction ranges beyond nearest-neighbor constraints.

Theoretically, the successful use of silicon for this method suggests prospective avenues into the exploration of silicon-based valley states and their effects on spin coherence and transport fidelity. Future work may delve further into integrating this shuttling mechanism with spin transit modules, thereby integrating charge and spin shuttling to enhance quantum processor capabilities. Extending this concept to two-dimensional arrays and handling the associated complexity of the charge stability landscape remains a tantalizing direction, potentially allowing new approaches in scalable quantum device construction.

Conclusively, this paper substantiates a critical step in quantum information processing, laying the groundwork for scalable, highly-linked quantum dot systems that are essential for advancing silicon-based quantum technologies. The methodologies and results presented offer a vivid direction for researchers aiming to intersect the scalability of quantum dots with the robustness required for fault-tolerant quantum computation.