Benchmarking logical three-qubit quantum Fourier transform encoded in the Steane code on a trapped-ion quantum computer

Abstract: We implement logically encoded three-qubit circuits for the quantum Fourier transform (QFT), using the [[7,1,3]] Steane code, and benchmark the circuits on the Quantinuum H2-1 trapped-ion quantum computer. The circuits require multiple logical two-qubit gates, which are implemented transversally, as well as logical non-Clifford single-qubit rotations, which are performed by non-fault-tolerant state preparation followed by a teleportation gadget. First, we benchmark individual logical components using randomized benchmarking for the logical two-qubit gate, and a Ramsey-type experiment for the logical $T$ gate. We then implement the full QFT circuit, using two different methods for performing a logical control-$T$, and benchmark the circuits by applying it to each basis state in a set of bases that is sufficient to lower bound the process fidelity. We compare the logical QFT benchmark results to predictions based on the logical component benchmarks.

• The paper benchmarks a logical three-qubit quantum Fourier transform encoded using the [[7,1,3]] Steane code on a trapped-ion quantum computer, demonstrating advancements in fault-tolerant logical circuit execution.
• Logical two-qubit gate fidelities reached up to 0.9991, but the crucial logical T gate showed lower fidelity (0.990), highlighting challenges in non-Clifford operations for fault-tolerant computation.
• Logical QFT circuit benchmarking revealed system-level performance gaps compared to component fidelities, suggesting memory errors and coherent noise impact, and identifies logical QFT as a potential system-level benchmark.

An Overview of Benchmarking a Logical Three-Qubit Quantum Fourier Transform on a Trapped-Ion Quantum Computer

The paper discusses a study on implementing and benchmarking a logically encoded three-qubit quantum Fourier transform (QFT) circuit using the [[7,1,3]] Steane code. The circuits are tested on the Quantinuum H2-1 trapped-ion quantum computer. This work is significant for advancing quantum error correction (QEC) and logical circuit benchmarks, integral components of scalable quantum computing.

Methodology and Technical Implementation

The authors implemented logical three-qubit circuits for the QFT using the [[7,1,3]] Steane code. This code encodes one logical qubit into seven physical qubits, providing fault tolerance against single-qubit errors. Logical two-qubit gates were executed transversally, while logical non-Clifford single-qubit rotations were facilitated by state preparation and teleportation gadgets. The logical $T$ gate, a critical element for universality, was implemented through non-fault-tolerant state preparation leveraging teleportation.

Benchmarking Methods:

• Component-Level Benchmarking: Logical two-qubit gates were evaluated using randomized benchmarking (RB), with fidelities assessed by measuring decay of survival probability and estimated by fitting to a suitable model.
• System-Level Benchmarking: The full QFT circuit was evaluated using logical control-$T$ methods. Process fidelity was inferred by executing the QFT on computational and Fourier basis states to achieve a lower bound.

Results and Analysis

Logical two-qubit gate average fidelities were recorded as 0.9991(2) on H1-1 and 0.9980(8) on H2-1, showcasing the potential for achieving break-even error rates with logical encoding on certain hardware. In contrast, the logical $T$ gate on H2-1 reflected a lower fidelity of 0.990(1), indicating challenges in non-Clifford gate implementations.

The logical QFT circuit was benchmarked using two different methods for logical control-$T$:

1. Recursive-Teleportation Gadget: Involves nested use of teleportation for $P(\theta)$ gates.
2. Ancilla-Assisted Control-T: Utilizes additional ancilla qubits and conditional mid-circuit measurements for improved gate implementations.

The authors observed output state fidelities averaging 0.78(1) and 0.66(1) for these methods respectively, with improvements through post-selection on syndrome information.

Implications and Prospective Directions

This work exhibits the intricacies and demands of logical circuit benchmarking and highlights the necessity of advancing non-Clifford operations, especially logic $T$ gates. The study indicates that while logical fidelities are nearing break-even with physical hardware, fault tolerance below the break-even error rates will require either higher-distance codes or entirely fault-tolerant circuit construction.

The results underline the challenges in closing the gap between component error rates and those observed at the system level, hinting that memory errors during ion transport and possibly coherent noise accumulation might significantly contribute to QFT performance discrepancies. Thus, memory error characterization and methods to mitigate coherent noise present substantive research paths forward.

The authors advocate for ongoing development in logical benchmarking methodologies and suggest that logical QFT could serve as a robust system-level benchmark for future quantum processors. This study lays foundational work for scientifically substantive exploration in both theoretical understanding and practical advancement of logical circuit execution in quantum computation. Future exploration might explore implementing other QFT-based algorithms and expanding application horizons of logical quantum computation.