0.5 Petabyte Simulation of a 45-Qubit Quantum Circuit (1704.01127v2)

Abstract: Near-term quantum computers will soon reach sizes that are challenging to directly simulate, even when employing the most powerful supercomputers. Yet, the ability to simulate these early devices using classical computers is crucial for calibration, validation, and benchmarking. In order to make use of the full potential of systems featuring multi- and many-core processors, we use automatic code generation and optimization of compute kernels, which also enables performance portability. We apply a scheduling algorithm to quantum supremacy circuits in order to reduce the required communication and simulate a 45-qubit circuit on the Cori II supercomputer using 8,192 nodes and 0.5 petabytes of memory. To our knowledge, this constitutes the largest quantum circuit simulation to this date. Our highly-tuned kernels in combination with the reduced communication requirements allow an improvement in time-to-solution over state-of-the-art simulations by more than an order of magnitude at every scale.

• The paper introduces a scalable simulation of a 45-qubit quantum circuit using 0.5 petabytes across 8,192 nodes.
• The paper leverages automated code generation and optimized compute kernels to minimize inter-node communication and boost efficiency.
• The paper achieves an average performance of 0.428 PFLOPS, setting a new benchmark for validating and advancing quantum hardware.

Simulation of Quantum Circuits: A 45-Qubit Case Study

In the field of quantum computing, the capacity to simulate quantum circuits on classical systems stands as a critical requirement for validating, calibrating, and benchmarking nascent quantum technologies. The paper "0.5 Petabyte Simulation of a 45-Qubit Quantum Circuit" by Thomas Hänter and Damian S. Steiger offers a meticulous examination of such simulations, specifically the quantum supremacy circuit, deploying one of the most formidable contemporary supercomputers, the Cori II.

Overview of Simulation Methods

The authors successfully simulate a 45-qubit quantum circuit by leveraging approximately 0.5 petabytes of memory across 8,192 computing nodes. This feat is noteworthy, establishing a new benchmark for the maximum number of qubits ever simulated. Importantly, the simulation employs automatic code generation and optimization of compute kernels to fully exploit the potential of modern multi-core and many-core processors. The performance optimizations include:

1. Automated Kernel Optimization: The use of highly-tuned kernels derived from automatic code generation ensures adaptive scaling across various hardware architectures. This approach minimizes the bottleneck in execution speed, traditionally constrained by memory bandwidth.
2. Scheduling and Communication Reduction: By applying a clustering and scheduling algorithm, the required inter-node communication is significantly reduced. This is essential because the communication overhead is a major impediment in distributed quantum simulations. The optimized strategy leads to a reduced number of communication-intensive operations, notably lowering the computation time as compared to previous simulators.
3. Improved Operational Intensity: The simulator uses various gate kernel sizes up to five qubits, allowing for increased operational intensity and better utilization of available memory bandwidth beyond typical single or two-qubit operations.

Results and Performance Metrics

The paper outlines tangible improvements in computational efficiency and reduction in execution time. For instance, simulations of 36- and 42-qubit quantum supremacy circuits demonstrated remarkable speedups by over an order of magnitude compared to previous state-of-the-art methods. The authors report achieving an average performance of 0.428 PFLOPS on 8,192 nodes during the simulation of the 45-qubit circuit — a commendable result given the complexity and scale involved.

Implications and Future Directions

The implications of these results are considerable for both the theoretical and practical aspects of quantum computing. By providing insights into simulating near-term quantum devices, this work lays the groundwork for the design and development of efficient quantum hardware, eventually informing the architecture of quantum computers themselves. It also bridges the current capability gap, suggesting that simulations of even larger circuits might be feasible with similar frameworks and could be an integral part of quantum device verification and optimization.

The evidence of scalability and performance could poise such simulation techniques for significant roles in future applications, particularly as quantum chips grow in qubit count and algorithmic complexity. Furthermore, the work provokes discussion on the feasibility of using solid-state drives or similar technologies to extend memory capabilities beyond current limitations, suggesting avenues for achieving simulations of up to 49 qubits.

In conclusion, Hänter and Steiger’s paper contributes critical computational strategies and data for advancing the simulation of quantum circuits, affirming that current hardware, when coupled with sophisticated software optimizations, can approximate future-thinking quantum processes. As quantum supremacy continues to evolve, such studies will undoubtedly influence ongoing research and development, making efficient quantum circuit simulations more accessible and effective.